H01L2223/665

FRONT END SYSTEMS AND RELATED DEVICES, INTEGRATED CIRCUITS, MODULES, AND METHODS

Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a receive path and a multi-mode power amplifier circuit in a transmit path. The low noise amplifier includes a first inductor, an amplification circuit, and a second inductor magnetically coupled to the first inductor to provide negative feedback to linearize the low noise amplifier. The multi-mode power amplifier circuit includes a stacked output stage including a transistor stack of two or more transistors. The multi-mode power amplifier circuit also includes a bias circuit configured to control a bias of at least one transistor of the transistor stack based on a mode of the multi-mode power amplifier circuit. Other embodiments of front end systems are disclosed, along with related devices, integrated circuits, modules, methods, and components thereof.

MODULARIZED POWER AMPLIFIER DEVICES AND ARCHITECTURE

A packaged semiconductor chip includes a power amplifier die including a semiconductor substrate, and an input contact pad, an output contact pad, first and second direct-current (DC) contact pads, one or more transistors having an input coupled to the input contact pad, and an input bias coupling path electrically coupling the first DC contact pad to the second DC contact pad and the input contact pad implemented on the semiconductor substrate. The chip further includes a lead frame having one or more radio-frequency input pins electrically coupled to the input contact pad, one or more radio-frequency output pins electrically coupled to the output contact pad, and first and second input bias pins electrically coupled to the first and second DC contact pads, respectively.

AMPLIFIERS AND AMPLIFIER MODULES WITH SHUNT INDUCTANCE CIRCUITS THAT INCLUDE HIGH-Q CAPACITORS

A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.

INTEGRATED RF FRONT END SYSTEM
20180130876 · 2018-05-10 ·

Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements.

Monolithic microwave integrated circuit device with internal decoupling capacitor

A power amplifier according to some embodiments includes a submount, a monolithic microwave integrated circuit (MMIC) die on the submount, the MMIC die including an RF transistor configured to operate at frequencies greater than 26.5 GHz, and an internal decoupling capacitor on the submount and connected to a drain of the RF transistor. The internal decoupling capacitor has a capacitance greater than 2 nF.

Power amplifier modules including semiconductor resistor and tantalum nitride terminated through wafer via

One aspect of this disclosure is a power amplifier module that includes a power amplifier, a semiconductor resistor, a tantalum nitride terminated through wafer via, and a conductive layer electrically connected to the power amplifier. The semiconductor resistor can include a resistive layer that includes a same material as a layer of a bipolar transistor of the power amplifier. A portion of the conductive layer can be in the tantalum nitride terminated through wafer via. The conductive layer and the power amplifier can be on opposing sides of a semiconductor substrate. Other embodiments of the module are provided along with related methods and components thereof.

Power amplifier modules with power amplifier and transmission line and related systems, devices, and methods

One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to amplify a radio frequency (RF) signal and an RF transmission line electrically coupled to an output of the power amplifier. The power amplifier includes a heterojunction bipolar transistor and a p-type field effect transistor, in which a semiconductor portion of the p-type field effect transistor corresponds to a channel includes the same type of semiconductor material as a collector layer of the heterojunction bipolar transistor. The RF transmission line includes a nickel layer with a thickness that is less than 0.5 um, a conductive layer under the nickel layer, a palladium layer over the nickel layer, and a gold layer over the palladium layer. Other embodiments of the module are provided along with related methods and components thereof.

RF circuit with multiple-definition RF substrate and conductive material void under a bias line
09871501 · 2018-01-16 · ·

An RF circuit includes a first dielectric material, a signal line and a bias line over a first surface of the first dielectric material, a conductive layer over a second surface of the first dielectric material, and a second dielectric material over the conductive layer. The first and second dielectric materials have different dielectric constants. The conductive layer includes a ground plane over which the signal line is formed. A conductive material void, with which a section of the bias line is aligned, is present in the second conductive layer. The RF circuit further includes a mounting area for an RF device. First ends of the signal line and the section of the bias line are located proximate to the mounting area to enable the signal line and the bias line to be electrically coupled with one or more leads of the RF device.

Monolithic semiconductor device and hybrid semiconductor device

A monolithic semiconductor device includes: a substrate; a first nitride semiconductor layer disposed on the substrate; a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; a first transistor disposed on the substrate and including the first nitride semiconductor layer and the second nitride semiconductor layer, the first transistor being of a high-electron-mobility transistor (HEMT) type for power amplification; and a first bias circuit disposed on the substrate and including a second transistor of the HEMT type disposed outside a propagation path of a radio-frequency signal inputted to the first transistor, the first bias circuit applying bias voltage to a gate of the first transistor.

Semiconductor device and semiconductor module

In a semiconductor device, when a first surface of a first member is viewed in plan, a plurality of circuit blocks are disposed in an inner region of the first surface. The second member is joined to the first surface of the first member in surface contact with the first surface. The second member includes one or more circuit blocks. A conductive protrusion protrudes from the second member on an opposite side to the first member. One of the circuit blocks in the second member constitutes a first amplifier circuit including a plurality of first transistors that are connected in parallel to each other. At least one of the circuit blocks in the first member overlaps at least one circuit block in the second member in a plan view.