A semiconductor device includes: a substrate; a circuit element disposed on a first surface side of the substrate; a first transmission line disposed on the first surface side; a first terminal disposed on the first surface side; a first dielectric disposed in a part of the first transmission line; a second terminal disposed on a side of the first dielectric opposite to the first transmission line; a second transmission line disposed on the first surface side and has one end coupled to the circuit element; a third terminal disposed on the first surface side and coupled to the other end of the second transmission line; a second dielectric disposed in a part of the second transmission line; a fourth terminal disposed on a side of the second dielectric opposite to the second transmission line; and a conductor disposed on a second surface side of the substrate.

Disclosed is an antenna module including a first printed circuit board (PCB) including a first surface facing a first direction and a second surface facing a second direction opposite the first direction, a second PCB including a third surface facing the first direction spaced from the first PCB and a fourth surface facing the second direction spaced from the first surface, a radio frequency integrated circuit (RFIC) disposed on the first surface, and a connection member comprising a conductive material connecting the first surface to the fourth surface. The at least one first conductive pattern is connected to the RFIC. The at least one third conductive pattern is connected to the RFIC via the connection member. The at least one first conductive pattern and the at least one third conductive pattern at least partially overlap with each other at least partly, when viewed from above the second surface.

A semiconductor structure and a method of forming the same are provided. A method of manufacturing the semiconductor structure includes: providing a substrate; depositing a first dielectric layer over the substrate; attaching a waveguide to the first dielectric layer; depositing a second dielectric layer to laterally surround the waveguide; and forming a first conductive member and a second conductive member over the second dielectric layer and the waveguide, wherein the first conductive member and the second conductive member are in contact with the waveguide. The waveguide is configured to transmit an electromagnetic signal between the first conductive member and the second conductive member.

A structure is provided that reduces the stress generated in a semiconductor device package during cooling subsequent to solder reflow operations for coupling semiconductor devices to a printed circuit board (PCB). Stress reduction is provided by coupling solder lands to metal-layer structures using traces on the PCB that are oriented approximately perpendicular to lines from an expansion neutral point associated with the package. In many cases, especially where the distribution of solder lands of the semiconductor device package are uniform, the expansion neutral point is in the center of the semiconductor device package. PCB traces having such an orientation experience reduced stress due to thermal-induced expansion and contraction as compared to traces having an orientation along a line to the expansion neutral point.

An electronic device that has an antenna device that includes a conductive pattern layer comprising a first antenna element, the conductive pattern layer formed in an insulating substrate and adjacent to a first surface of the insulating substrate, and a second antenna element formed on a second surface of the insulating substrate opposite the first surface. The electronic device further has a semiconductor package that includes a redistribution layer (RDL) structure bonded and electrically connected to the conductive pattern layer, a first electronic component electrically connected to the RDL structure, and an encapsulating layer formed on the RDL structure and surrounding the first electronic component.

Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure. The semiconductor chip has a sensing surface. The redistribution layer structure is arranged to form an antenna transmitter structure aside the semiconductor chip and an antenna receiver structure over the sensing surface of the semiconductor chip.

A method of manufacturing a semiconductor device including operations including the operations of forming a ground plane over a substrate, forming a first conductive pillar in contact with the ground plane and attaching a die to the substrate, electrically isolating the die from the first conductive pillar with a dielectric fill material, forming a dielectric pad of a high-κ dielectric material (having a κ of at least 7 Farads/meter) at an end of the first conductive pillar opposite the ground plane, forming an antenna pad over the dielectric pad, and establishing an electrical connection between the antenna pad and the die.

A module includes: a substrate having a first surface and a second surface opposed to each other; a component mounted on the first surface; a sealing resin that covers the first surface and the component; a shield film formed to cover an upper surface and a side surface of the sealing resin and a side surface of the substrate; and a resist film formed to cover the second surface. The resist film has a plurality of protrusions.

A semiconductor package includes a substrate, an interposer, a primary component layer, a first redistribution layer, multiple solder bumps and a first hybrid bonding structure. The interposer is disposed above the substrate and includes multiple TSV sets. The primary component layer is disposed above the interposer and includes multiple first chips and a first molding material that fills the space between the multiple first chips. The first redistribution layer is disposed between the primary component layer and the interposer and includes at least one portion of an antenna structure. The plurality of solder bumps is disposed between the substrate and the interposer. The first hybrid bonding structure is disposed between the multiple first chips and the multiple TSV sets for electrical connection in between and includes multiple connection components that respectively apply bonding of multiple metal pieces in between.

Electronic modules and methods of fabrication are described. In an embodiment, an electronic module includes a molded system-in-package, and a flexible circuit mounted on a side surface of a molding compound layer such that the flexible circuit is in electrical contact with a lateral interconnect exposed along the side surface of the molding compound layer.