An embodiment is a structure including a first semiconductor device and a second semiconductor device, a first set of conductive connectors mechanically and electrically bonding the first semiconductor device and the second semiconductor device, a first underfill between the first and second semiconductor devices and surrounding the first set of conductive connectors, a first encapsulant on at least sidewalls of the first and second semiconductor devices and the first underfill, and a second set of conductive connectors electrically coupled to the first semiconductor device, the second set of conductive connectors being on an opposite side of the first semiconductor device as the first set of conductive connectors.

A semiconductor package includes a first semiconductor chip including a first surface and a second surface, and including a first active layer on a portion adjacent to the first surface; a first redistribution structure on the first surface of the first semiconductor chip, wherein the first redistribution structure includes a first area and a second area next to the first area; a second semiconductor chip mounted in the first area of the first redistribution structure, including a third surface, which faces the first surface, and a fourth surface, and including a second active layer on a portion adjacent to the third surface; a conductive post mounted in the second area of the first redistribution structure; a molding layer at least partially surrounding the second semiconductor chip and the conductive post on the first redistribution structure; and a second redistribution structure disposed on the molding layer and connected to the conductive post.

A semiconductor device has a semiconductor wafer including a plurality of semiconductor die. An insulating layer is formed over the semiconductor wafer. A portion of the insulating layer is removed by LDA to expose a portion of an active surface of the semiconductor die. A first conductive layer is formed over a contact pad on the active surface of the semiconductor die. The semiconductor wafer is singulated to separate the semiconductor die. The semiconductor die is disposed over a carrier with the active surface of the semiconductor die offset from the carrier. An encapsulant is deposited over the semiconductor die and carrier to cover a side of the semiconductor die and the exposed portion of the active surface. An interconnect structure is formed over the first conductive layer. Alternatively, a MUF material is deposited over a side of the semiconductor die and the exposed portion of the active surface.

An embodiment method for forming a semiconductor package includes attaching a first die to a first carrier, depositing a first isolation material around the first die, and after depositing the first isolation material, bonding a second die to the first die. Bonding the second die to the first die includes forming a dielectric-to-dielectric bond. The method further includes removing the first carrier and forming fan-out redistribution layers (RDLs) on an opposing side of the first die as the second die. The fan-out RDLs are electrically connected to the first die and the second die.

A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant and a RDL structure, the encapsulant encapsulate sidewalls of the die. The RDL structure is disposed on the die and the encapsulant. The RDL structure includes a first dielectric structure and a first redistribution layer. The first dielectric structure includes a first dielectric material layer and a second dielectric material layer on the first dielectric material layer. The first redistribution layer is embedded in the first dielectric structure and electrically connected to the die, the redistribution layer comprises a first seed layer and a first conductive layer disposed on the first seed layer. A topmost surface of the first seed layer and a topmost surface of the first conductive layer are substantially level with a top surface of the second dielectric material layer.

A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant and a RDL structure, the encapsulant encapsulate sidewalls of the die. The RDL structure is disposed on the die and the encapsulant. The RDL structure includes a first dielectric structure and a first redistribution layer. The first dielectric structure includes a first dielectric material layer and a second dielectric material layer on the first dielectric material layer. The first redistribution layer is embedded in the first dielectric structure and electrically connected to the die, the redistribution layer comprises a first seed layer and a first conductive layer disposed on the first seed layer. A topmost surface of the first seed layer and a topmost surface of the first conductive layer are substantially level with a top surface of the second dielectric material layer.

An optical sensor and filter assembly is provided and includes an optical sensor, a filter and a mounting structure. The optical sensor includes a detector layer having first and second opposed faces and a read-out integrated circuit (ROIC) to which the first face of the detector layer is hybridized. The filter permits passage of one or more wavelength bands of interest of incident light toward the optical sensor and the mounting structure directly hybridizes the filter to the second face of the detector layer.

Methods for forming a semiconductor device structure are provided. The method includes forming a conductive feature in a first wafer, and forming a first bonding layer over the conductive feature. The method includes forming a second bonding layer over a second wafer, and bonding the first wafer and the second wafer by bonding the first bonding layer and the second bonding layer. The method also includes forming a second transistor in a front-side of the second wafer, and after forming the second transistor in the front-side of the second wafer, forming a first TSV through the second wafer, wherein the first TSV stops at the conductive feature.

A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.

Integrated circuit packages and methods of forming the same are disclosed. A first die is mounted on a first side of a workpiece, the workpiece including a second die. The workpiece is mounted to a front side of a package substrate, where the first die is at least partially disposed in a through hole in the package substrate. A heat dissipation feature may be attached on a second side of the workpiece. An encapsulant may be formed on the front side of the package substrate around the workpiece.