Patent classifications
H01L2924/15159
ELECTRONIC CIRCUIT PACKAGE
Disclosed herein is an electronic circuit package includes: a substrate having a power supply pattern; an electronic component mounted on a surface of the substrate; a mold resin covering the surface of the substrate so as to embed therein the electronic component; a magnetic film formed of a composite magnetic material obtained by dispersing magnetic fillers in a thermosetting resin material, the magnetic film covering upper and side surfaces of the molding resin and an edge portion of the front surface exposed to aside surface of the substrate; and a metal film connected to the power supply pattern and covering the molding resin through the magnetic film.
ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE THEREOF
A substrate structure is provided, which includes a substrate having a plurality of conductors and at least a receiving space formed on a surface of the substrate with the receiving space free from penetrating the substrate. During an encapsulating process, an encapsulant can be filled in the receiving space so as to strengthen the bonding between the substrate and the encapsulant, thereby preventing delamination from occurring therebetween.
ELECTRONIC CIRCUIT PACKAGE
Disclosed herein is an electronic circuit package includes: a substrate having a power supply pattern; an electronic component mounted on a surface of the substrate; a magnetic mold resin formed of a composite magnetic material including a thermosetting resin material and a magnetic filler, the magnetic mold resin covering the surface of the substrate so as to embed therein the electronic component; and a metal film connected to the power supply pattern and covering at least a top surface of the magnetic mold resin. A volume resistance value of the magnetic mold resin is equal to or larger than 10.sup.10Ω, and a resistance value at an interface between the top surface of the magnetic mold resin and the metal film is equal to or larger than 10.sup.6Ω.
ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE
Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.
ELECTRONIC CIRCUIT PACKAGE
Disclosed herein is an electronic circuit package includes: a substrate having a power supply pattern; an electronic component mounted on a surface of the substrate; a mold resin covering the surface of the substrate so as to embed therein the electronic component; a laminated structure of a magnetic film and a metal film, the laminated structure covering at least an upper surface of the molding resin. The metal film is connected to the power supply pattern, and a resistance value at an interface between the magnetic film and the metal film is equal to or larger than 10.sup.6Ω.
WIRING BOARD, ELECTRONIC DEVICE, AND ELECTRONIC MODULE
A wiring board (1) includes an insulating substrate (11) having a cutout (12) opened in a main surface and a side surface of the insulating substrate (11), and an inner electrode (13) formed on an inner surface of the cutout (12). The inner electrode (13) includes a plurality of metal layers. The inner electrode (13) includes, as an intermediate layer, at least one metal layer (17b) selected from the group consisting of a nickel layer, a chromium layer, a platinum layer, and a titanium layer, and includes a gold layer as an outermost layer (17a). The metal layer (17b) is exposed at an outer edge portion of the inner electrode (13).
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
ELECTRONIC CIRCUIT PACKAGE USING COMPOSITE MAGNETIC SEALING MATERIAL
Disclosed herein is an electronic circuit package includes a substrate, an electronic component mounted on a surface of the substrate, and a magnetic mold resin covering the surface of the substrate so as to embed therein the electronic component. The magnetic mold resin includes a resin material and a filler blended in the resin material in a blended ratio of 30 vol. % or more to 85 vol. % or less. The filler includes a magnetic filler containing Fe and 32 wt. % or more and 39 wt. % or less of a metal material contained mainly of Ni, thereby a thermal expansion coefficient of the magnetic mold resin is 15 ppm/° C. or less.
3D semiconductor package interposer with die cavity
Disclosed herein is a method of forming a device, comprising mounting a plurality of first interconnects on one or more first integrated circuit dies. One or more second integrated circuit dies are mounted on a first side of an interposer. The interposer is mounted at a second side to the first integrated circuit dies, the plurality of first interconnects disposed outside of the interposer. The interposer is mounted to a first side of a substrate by attaching the first interconnects to the substrate, the substrate in signal communication with one or more of the first integrated circuit dies through the first interconnects.
Semiconductor die assembly and methods of forming thermal paths
Semiconductor die assemblies and methods of forming the same are described herein. As an example, a semiconductor die assembly may include a thermally conductive casing, a first face of a logic die coupled to the thermally conductive casing to form a thermal path that transfers heat away from the logic die to the thermally conductive casing, a substrate coupled to a second face of the logic die, and a die embedded at least partially in a cavity of the substrate.