H01L2924/15312

IC PACKAGE

In a method for fabricating an integrated circuit (IC) package, one or more IC chips are stacked on a package substrate. A marking plate is formed on the one or more IC chips with a first major surface facing the one or more IC chips. A plastic structure is formed to encapsulate the one or more IC chips and the marking plate such that a second major surface of the marking plate is a portion of an outer surface of the IC package.

Package-integrated bistable switch for electrostatic discharge (ESD) protection

Embodiments may relate to a package substrate that includes a signal line and a ground line. The package substrate may further include a switch communicatively coupled with the ground line. The switch may have an open position where the switch is communicatively decoupled with the signal line, and a closed position where the switch is communicatively coupled with the signal line. Other embodiments may be described or claimed.

Methods for establishing thermal joints between heat spreaders or lids and heat sources

According to various aspects, exemplary embodiments are disclosed of thermal interface materials, electronic devices, and methods for establishing thermal joints between heat spreaders or lids and heat sources. In exemplary embodiments, a method of establishing a thermal joint for conducting heat between a heat spreader and a heat source of an electronic device generally includes positioning a thermal interface material (TIM1) between the heat spreader and the heat source.

Semiconductor device and method for manufacturing semiconductor device

A semiconductor device and a method for manufacturing a semiconductor device that enable characteristics to be improved are provided. A semiconductor device includes a substrate that has a first surface and a second surface that is located opposite the first surface, a first element that is disposed on the first surface, and a first resin layer that is disposed on the first surface and that is disposed around the first element in a plan view. The substrate includes a wiring layer. The first element includes a semiconductor layer, an electrode portion that is located on a surface of the semiconductor layer facing the substrate, and an insulating layer that is located opposite the electrode portion with the semiconductor layer interposed therebetween. The electrode portion is connected to the wiring layer. A height of the first resin layer from the first surface is more than a height of the first element from the first surface.

SEMICONDUCTOR DEVICE
20220336399 · 2022-10-20 ·

A semiconductor device including a semiconductor chip having a first conduction element; a substrate having second and third conduction elements; and external connection elements configured to form an electrical path between the second and third conduction elements via the first conduction element.

INTEGRATED CIRCUIT PACKAGE WITH GLASS SPACER
20220254757 · 2022-08-11 ·

Apparatuses, systems and methods associated with integrated circuit (IC) package design are disclosed herein. In embodiments, an IC package may include a first die and a second die. The IC package may include a spacer located between the first die and the second die, the spacer includes glass, and a molding compound that at least partially encompasses the first die, the second die, and the spacer. Other embodiments may be described and/or claimed.

Integrated circuit package with glass spacer

Apparatuses, systems and methods associated with integrated circuit (IC) package design are disclosed herein. In embodiments, an IC package may include a first die and a second die. The IC package may include a spacer located between the first die and the second die, the spacer includes glass, and a molding compound that at least partially encompasses the first die, the second die, and the spacer. Other embodiments may be described and/or claimed.

THERMALS FOR PACKAGES WITH INDUCTORS
20220238410 · 2022-07-28 · ·

An apparatus is provided which comprises: one or more pads comprising metal on a first substrate surface, the one or more pads to couple with contacts of an integrated circuit die, one or more substrate layers comprising dielectric material, one or more conductive contacts on a second substrate surface, opposite the first substrate surface, the one or more conductive contacts to couple with contacts of a printed circuit board, one or more inductors on the one or more substrate layers, the one or more inductors coupled with the one or more conductive contacts and the one or more pads, and highly thermally conductive material between the second substrate surface and a printed circuit board surface, the highly thermally conductive material contacting the one or more inductors. Other embodiments are also disclosed and claimed.

SEMICONDUCTOR LASER DEVICE

A semiconductor laser device comprises a stem serving as a base; a laser diode LD submount having surface electrodes arranged thereon and joined to the surface of the stem; an LD chip joined to the surface electrode and connected with the surface electrode; and leads fixed in through holes formed in the stem by means of sealing parts and electrically connected to the surface electrodes via embedded layers in via holes formed in the LD submount, wherein grooves are formed in portions of the sealing parts or in portions of the LD submount around the connections between the leads and the embedded layers, to obtain a good modulated light waveform.

EMBEDDED COPPER STRUCTURE FOR MICROELECTRONICS PACKAGE
20220238482 · 2022-07-28 ·

An electronic component and a method of manufacturing an electronic component, the method including surface mounting electronic components to a printed circuit board (PCB), applying a flip-chip die integrated circuit (IC) to the PCB and underfilling the flip-chip IC to secure the PCB. The method also includes sintering a copper block to the PCB, where the copper block is in thermal communication with the IC and acts as a thermal path for removing heat generated by the flip-chip IC.