A package has a package body formed by stacked insulating layers and having a front surface including a mounting area, a back surface and a side surface; a plurality of hollow portions arranged so as to be adjacent to each other on the front surface of the package body; a plurality of electrode pads individually placed on respective bottom surfaces of the hollow portions; and a partition wall formed by at least one insulating layer that forms the package body and having protruding banks at its both edge sides. Surfaces of the electrode pads are located at a lower position with respect to the front surface of the package body. The hollow portions are arranged at opposite sides of the partition wall. The electrode pads are electrically connected to respective conductor layers that are formed on the back surface and/or the side surface of the package body.

A semiconductor device of an embodiment includes: a wiring board; a semiconductor chip mounted on the wiring board; and a resin-containing layer bonded on the wiring board so as to fix the semiconductor chip to the wiring board. The resin-containing layer contains a resin-containing material having a breaking strength of 15 MPa or more at 125° C.

An endoscope includes an image pickup module, and the image pickup module includes: an image pickup device an external electrode being disposed on a back surface of the image pickup device; a wiring element provided with a through-hole passing through a first main surface and a second main surface, a first electrode on the first main surface being bonded with the external electrode; a signal cable bonded with a second electrode on the second main surface of the wiring element; and a first resin that seals a first bump bonding the first electrode and the external electrode and a second bump bonding the second electrode and the signal cable, and fills the through-hole.

Before a semiconductor die of a brittle III-V compound semiconductor is encapsulated with a molding compound during package fabrication, side surfaces of the semiconductor die are treated to avoid or prevent surface imperfections from propagating and fracturing the crystal structure of the substrate of the III-V compound semiconductor under the stresses applied as the molding compound solidifies. Surfaces are treated to form a passivation layer, which may be a passivated layer of the substrate or a passivation material on the substrate. In a passivated layer, imperfections of an external layer are transformed to be less susceptible to fracture. Passivation material, such as a poly-crystalline layer on the substrate surface, diffuses stresses that are applied by the molding compound. Semiconductor dies in flip-chip and wire-bond chip packages with treated side surfaces as disclosed have a reduced incidence of failure caused by die fracturing.

Disclosed is an EMI shielding material. The EMI shielding material comprises a resin material and metal particles mixed with each other, wherein the surface of the metal particles has an insulating protective layer. Further disclosed is a communication module product, comprising a module element arranged on a substrate, wherein the periphery of the module element that requires EMI shielding is filled with said shielding material. Further disclosed is an EMI shielding process, comprising the following steps: a. preparing a communication module on which a module element is provided; and b. applying said shielding material to a region of the module element that needs to be EMI shielded on the communication module. The shielding material can shield a chip region in a wrapping manner, that is, the shielding material can wrap and shield all six surfaces or six directions of the chip, and can provide shielding between chips. The shielding material, when combined with an existing shielding process, can achieve good shielding from low frequencies to high frequencies, and has very low process costs.

Embodiments described herein may be related to apparatuses, processes, and techniques related to multilevel dies, in particular to photonics integrated circuit dies with a thick portion and a thin portion, where the thick portion is placed within a cavity in a substrate and the thin portion serves as an overhang to physically couple with the substrate, to reduce a distance between electrical contacts on the thin portion of the die and electrical contacts on the substrate. Other embodiments may be described and/or claimed.

Electronic packages and related methods are disclosed. An example electronic package apparatus includes a substrate and an electronic component. A protective material is positioned on a first surface, a second surface and all side surfaces of the electronic component to encase the electronic component. An enclosure is coupled to the substrate to cover the protective material and the electronic component.

A semiconductor package includes a semiconductor substrate forming a cavity and a redistribution layer on a first side of the semiconductor substrate, the redistribution layer forming die contacts within the cavity and a set of terminals for the semiconductor package opposite the semiconductor substrate. The redistribution layer electrically connects one or more of the die contacts to the set of terminals. The semiconductor package further includes a semiconductor die including die terminals within the cavity with the die terminals electrically coupled to the die contacts within the cavity.

A radio frequency module includes a first substrate having a first principal surface and a second principal surface on the opposite side to the first principal surface; a signal terminal which is provided on the first principal surface and through which a signal is transmitted to and received from an external circuit; a power supply terminal that is provided on the second principal surface and is supplied with a power supply signal; an antenna; and a radio frequency electronic component that is electrically connected to the signal terminal, the power supply terminal and the antenna, and controls transmission and reception of the antenna based on the signal and the power supply signal.

A die assembly comprising: a first component layer having conductive through-connections in an insulator, a second component layer comprising a die, and an active device layer (ADL) at an interface between the first component layer and the second component layer. The ADL comprises active elements electrically coupled to the first component layer and the second component layer. The die assembly further comprises a bonding layer electrically coupling the ADL to the second component layer. In some embodiments, the die assembly further comprises another ADL at another interface between the first component layer and a package support opposite to the interface. The first component layer may comprise another die having through-substrate vias (TSVs). The die and the another die may be fabricated using different process nodes.