Patent classifications
H01L2924/15313
Package device
The present disclosure provides a package device including a conductive pad, a protecting block, and a redistribution layer. The protecting block is disposed on the conductive pad. The redistribution layer is disposed on the protecting block, and the conductive pad is electrically connected to the redistribution layer through the protecting block.
Selective EMI shielding using preformed mask with fang design
A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.
MODULE
A module includes a substrate including a first surface, at least one first component mounted on the first surface, a shield member mounted on the first surface to cover the first component, and a first sealing resin arranged at least between the shield member and the first surface. The shield member includes a top surface portion in a form of a plate and a plurality of leg portions that extend from the top surface portion toward the first surface.
FIDUCIAL FOR AN ELECTRONIC DEVICE
A substrate for an electronic device may include one or more layers. The substrate may include a cavity defined in the substrate. The cavity may be adapted to receive a semiconductor die. The substrate may include a fiducial mark positioned proximate the cavity. The fiducial mark may be exposed on a first surface of the substrate. The fiducial mark may include a first region including a dielectric filler material. The fiducial mark may include a second region including a conductive filler material. In an example, the second region surrounds the first region. In another example, the dielectric filler material has a lower reflectivity in comparison to the conductive filler material to provide a contrast between the first region and the second region.
MOAT PROTECTION TO PREVENT CRACK PROPAGATION IN GLASS CORE SUBSTRATES OR GLASS INTERPOSERS
Embodiments disclosed herein include electronic packages and methods of assembling such electronic packages. In an embodiment, an electronic package comprises a core, where the core comprises glass. In an embodiment, a hole is through a thickness of the core, and a plug fills the hole, where the plug comprises a polymeric material. In an embodiment, first layers are over the core, where the first layers comprise a dielectric material; and second layers are under the core, where the second layers comprise the dielectric material.
SEMICONDUCTOR DIE EMPLOYING REPURPOSED SEED LAYER FOR FORMING ADDITIONAL SIGNAL PATHS TO BACK END-OF-LINE (BEOL) STRUCTURE, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS
A semiconductor die (“die”) employing repurposed seed layer for forming additional signal paths to a back end-of-line (BEOL) structure of the die, and related integrated circuit (IC) packages and fabrication methods. A seed layer is repurposed that was disposed adjacent the BEOL interconnect structure to couple an under bump metallization (UBM) interconnect without a coupled interconnect bump thus forming an unraised interconnect bump, to a UBM interconnect that has a raised interconnect bump. To couple the unraised interconnect bump to the raised interconnect bump, the seed layer is selectively removed during fabrication to leave a portion of the seed layer repurposed that couples the UBM interconnect that does not have an interconnect bump to the UBM interconnect that has a raised interconnect bump. Additional routing paths can be provided between raised interconnect bumps to the BEOL interconnect structure through coupling of UBM interconnects to an unraised interconnect bump.
SEMICONDUCTOR LASER DRIVING APPARATUS, ELECTRONIC EQUIPMENT, AND MANUFACTURING METHOD OF SEMICONDUCTOR LASER DRIVING APPARATUS
To reduce the wiring inductance when establishing electrical connection between a semiconductor laser and a laser driver in a semiconductor laser driving apparatus. A semiconductor laser driving apparatus includes a substrate, a laser driver, and a semiconductor laser. The substrate incorporates the laser driver. The semiconductor laser is mounted on one surface of the substrate. Connection wiring electrically connects the laser driver and the semiconductor laser to each other with a wiring inductance of 0.5 nanohenries or less. A shield suppresses flow of electromagnetic waves to/from an outside of the semiconductor laser driving apparatus for at least one of the semiconductor laser and the laser driver.
Semiconductor packages with chiplets coupled to a memory device
Apparatuses, devices and systems associated with semiconductor packages with chiplet and memory device coupling are disclosed herein. In embodiments, a semiconductor package may include a first chiplet, a second chiplet, and a memory device. The semiconductor package may further include an interconnect structure that couples the first chiplet to a first memory channel of the memory device and the second chiplet to a second memory channel of the memory device. Other embodiments may be described and/or claimed.
Laser-releasable bonding materials for 3-D IC applications
Novel polyketanil-based compositions for use as a laser-releasable composition for temporary bonding and laser debonding processes are provided. The inventive compositions can be debonded using various UV lasers, at wavelengths from about 300 nm to about 360 nm, leaving behind little to no debris. The layers formed from these compositions possess good thermal stabilities and are resistant to common solvents used in semiconductor processing. The compositions can also be used as build-up layers for redistribution layer formation.
MICROELECTRONIC DEVICE PACKAGE INCLUDING ANTENNA AND SEMICONDUCTOR DEVICE
A described example includes: an antenna formed in a first conductor layer on a device side surface of a multilayer package substrate, the multilayer package substrate including conductor layers spaced from one another by dielectric material and coupled to one another by conductive vertical connection layers, the multilayer package substrate having a board side surface opposite the device side surface; and a semiconductor die mounted to the device side surface of the multilayer package substrate spaced from and coupled to the antenna.