An antenna apparatus includes a ground pattern having a through-hole; an antenna pattern disposed above the ground pattern and configured to either one or both of transmit and receive a radio-frequency (RF) signal; a feed via penetrating through the through-hole and having one end electrically connected to the antenna pattern; and a meta member comprising a plurality of cells repeatedly arranged and spaced apart from each other, each of the plurality of cells comprising a plurality of conductive patterns, and at least one conductive via electrically connecting the plurality of conductive patterns to each other, wherein the meta member is disposed along at least portions of side boundaries of the antenna pattern above the ground pattern, and extends above the antenna pattern.

A device that includes a first substrate comprising a first antenna, an integrated device coupled to the first substrate, an encapsulation layer located over the first substrate and the integrated device, a second substrate comprising a second antenna, and a flexible connection coupled to the first substrate and the second substrate. The device includes a shield formed over a surface of the encapsulation layer and a surface of the first substrate. The shield includes an electromagnetic interference (EMI) shield.

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes: patch antennas, encapsulated by a first encapsulant; a device die, vertically spaced apart from the patch antennas, and electrically coupled to the patch antennas; and at least one redistribution structure, disposed between the patch antennas and the device die, and including electromagnetic bandgap (EBG) structures laterally surrounding each of the patch antennas.

Various embodiments of a die carrier package and a method of forming such package are disclosed. The package includes one or more dies disposed within a cavity of a carrier substrate, where a first die contact of one or more of the dies is electrically connected to a first die pad disposed on a recessed surface of the cavity, and a second die contact of one or more of the dies is electrically connected to a second die pad also disposed on the recessed surface. The first and second die pads are electrically connected to first and second package contacts respectively. The first and second package contacts are disposed on a first major surface of the carrier substrate adjacent the cavity.

An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.

Embodiments described herein provide techniques for forming an interconnect structure that includes micro features formed therein. Such embodiments can assist with improving interconnect joint reliability when compared to conventional pads that have a flat surface. An interconnect structure may comprise: a metal pad over a substrate (e.g., a semiconductor package, a PCB, an interposer, etc.). Micro features may be formed in an edge of the metal pad or away from the edge of the metal pad. The micro features can assist with: (i) increasing the contact area between solder used to form an interconnect joint and the metal pad; and (ii) improving adherence of solder used to form an interconnect joint to the metal pad. These benefits can improve interconnect joint reliability by, among others, improving the interconnect joint's ability to absorb stress from substrates having differing coefficients of thermal expansion.

A module includes a wiring board having a first main surface, a first component mounted on the first main surface and having a first height H1, a second component mounted on the first main surface and having a second height H2 lower than the first height H1, and a sealing resin arranged so as to cover the first component and the second component while covering the first main surface. Compared to a first connection terminal used for connection between the first component and the first main surface, a second connection terminal used for connection between the second component and the first main surface has a higher height. A surface of the first component on a side far from the first main surface and a surface of the second component on a side far from the first main surface are exposed from the sealing resin.

An antenna apparatus includes a ground pattern having a through-hole; an antenna pattern disposed above the ground pattern and configured to either one or both of transmit and receive a radio-frequency (RF) signal; a feed via penetrating through the through-hole and having one end electrically connected to the antenna pattern; and a meta member comprising a plurality of cells repeatedly arranged and spaced apart from each other, each of the plurality of cells comprising a plurality of conductive patterns, and at least one conductive via electrically connecting the plurality of conductive patterns to each other, wherein the meta member is disposed along at least portions of side boundaries of the antenna pattern above the ground pattern, and extends above the antenna pattern.

A semiconductor device assembly and method of providing a semiconductor device assembly. The method includes providing a flexible interposer, providing a first redistribution layer on the flexible interposer, and providing a second redistribution layer on a portion of the first redistribution layer. The second redistribution layer is provided by additive manufacturing. The first redistribution layer may be deposited in a clean room environment. The first redistribution layer may be deposited via chemical deposition or physical deposition. A semiconductor device is attached to the first redistribution layer. The flexible interposer may be attached to a board with the semiconductor device being electrically connected to the board via the first redistribution layer, the flexible interposer, and the second redistribution layer. The flexible interposer may be attached to a flexible hybrid electronic (FHE) board. The flexible nature of the flexible interposer and/or the FHE board may redistribute stress on the semiconductor device assembly.

A electronic device includes an embedded ball land substrate and a semiconductor die. The embedded ball land substrate includes a top surface, a bottom surface opposite the top surface, and one or more side surfaces adjacent the top surface and the bottom surface. The embedded ball land substrate further includes a mold layer on the bottom surface, contact pads on the top surface, and ball lands embedded in the mold layer and electrically connected to the contact pads. The semiconductor die includes a first surface, a second surface opposite the first surface, one or more side surfaces adjacent the first surface and the second surface, and attachment structures along the second surface. The semiconductor die is operatively coupled to the contact pads via the attachment structures.