Patent classifications
H01S5/0237
Method of manufacturing light-emitting module, light-emitting module, and device
To provide a method of manufacturing a light-emitting module capable of accurately arranging a plurality of light-emitting elements at narrow intervals, and a light-emitting module manufactured by the method of manufacturing, and, moreover, a device on which the light-emitting module is mounted. Provided is a method of manufacturing a light-emitting module including: a plurality of light-emitting element arrays each including, in a plane parallel to resonator length of a light-emitting element, a plurality of the light-emitting elements arranged along a width direction perpendicular to a direction of the resonator length; and a substrate on which the plurality of light-emitting element arrays is mounted, the method including arranging the plurality of light-emitting elements on the substrate at predetermined intervals along the width direction in the light-emitting module, by causing side surfaces of the respective light-emitting element arrays adjacent to each other along the width direction to be in contact with each other and mounting the respective light-emitting element arrays on the substrate.
Integrating Silicon Photonics and Laser Dies using Flip-Chip Technology
An optoelectronic device includes an optoelectronic die, a laser die, and electrical interconnects. The optoelectronic device has a surface. A trench having first and second walls and a floor is formed in the surface, and an electrically conductive layer extends from the floor, via the first wall, to the surface. The laser die includes first and second electrodes and a laser output aperture. The laser die is mounted in the trench and is configured to emit a laser beam. The first electrode is coupled to the electrically conductive layer and the laser output aperture is mechanically aligned with a waveguide that extends from the second wall. The interconnects are formed on the second electrode of the laser die and on selected locations on the surface of the optoelectronic die. The interconnects are coupled to a substrate, and are configured to conduct electrical signals between the optoelectronic die and the substrate.
TRANSFER PROCESS TO REALIZE SEMICONDUCTOR DEVICES
A method of fabricating and transferring high quality and manufacturable light-emitting devices, such as micro-sized light-emitting diodes (μLEDs), edge-emitting lasers and vertical-cavity surface-emitting lasers (VCSELs), using epitaxial later over-growth (ELO) and isolation methods. III-nitride semiconductor layers are grown on a host substrate using a growth restrict mask, and the III-nitride semiconductor layers on wings of the ELO are then made into the light-emitting devices. The devices are isolated from the host substrate to a thickness equivalent to the growth restrict mask and then transferred or lifted from of the host substrate. Back-end processing of the devices is then performed, such as attaching distributed Bragg reflector (DBR) mirrors, forming cladding layers, and/or adding heatsinks.
TRANSFER PROCESS TO REALIZE SEMICONDUCTOR DEVICES
A method of fabricating and transferring high quality and manufacturable light-emitting devices, such as micro-sized light-emitting diodes (μLEDs), edge-emitting lasers and vertical-cavity surface-emitting lasers (VCSELs), using epitaxial later over-growth (ELO) and isolation methods. III-nitride semiconductor layers are grown on a host substrate using a growth restrict mask, and the III-nitride semiconductor layers on wings of the ELO are then made into the light-emitting devices. The devices are isolated from the host substrate to a thickness equivalent to the growth restrict mask and then transferred or lifted from of the host substrate. Back-end processing of the devices is then performed, such as attaching distributed Bragg reflector (DBR) mirrors, forming cladding layers, and/or adding heatsinks.
System and apparatus for sequential transient liquid phase bonding
Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
System and apparatus for sequential transient liquid phase bonding
Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
Decoupling layer to reduce underfill stress in semiconductor devices
An integrated circuit assembly includes a support (e.g., package substrate or circuit board) and a semiconductor die including a device. The semiconductor die is mounted to the support with the device facing the support. The device can be, for example, a quantum well laser device or a photonics device. A layer of decoupling material is on the device. An underfill material is between the semiconductor die and the support, where the decoupling material is between the device and the underfill material. The decoupling layer decouples stress from transferring from the underfill material into the device. For example, the decoupling material forms only weak bonds with the underfill material and/or a passivation layer on the device, in an embodiment. Weak bonds include non-covalent bonds and non-ionic bonds, for example. The decoupling material can be, for instance, a PTFE film, a poly(p-xylylene) film, a fluorocarbon, or a compound lacking free hydroxyl groups.
Decoupling layer to reduce underfill stress in semiconductor devices
An integrated circuit assembly includes a support (e.g., package substrate or circuit board) and a semiconductor die including a device. The semiconductor die is mounted to the support with the device facing the support. The device can be, for example, a quantum well laser device or a photonics device. A layer of decoupling material is on the device. An underfill material is between the semiconductor die and the support, where the decoupling material is between the device and the underfill material. The decoupling layer decouples stress from transferring from the underfill material into the device. For example, the decoupling material forms only weak bonds with the underfill material and/or a passivation layer on the device, in an embodiment. Weak bonds include non-covalent bonds and non-ionic bonds, for example. The decoupling material can be, for instance, a PTFE film, a poly(p-xylylene) film, a fluorocarbon, or a compound lacking free hydroxyl groups.
LASER DEVICE AND LASER PROJECTION APPARATUS
A laser device is provided. The laser device includes a bottom plate, a frame body, a heat sink and a light-emitting chip. The light-emitting chip is located on a surface of the heat sink away from the bottom plate. The light-emitting chip includes a plurality of first protrusions and/or a plurality of first depressions, the plurality of first protrusions and/or the plurality of first depressions are located on a first surface of the light-emitting chip; the heat sink includes a plurality of second depressions and/or a plurality of second protrusions, the plurality of second depressions and/or the plurality of second protrusions are located on a second surface of the heat sink; the plurality of first protrusions are located in the plurality of second depressions, and the plurality of second protrusions are located in the plurality of first depressions.
LASER DEVICE AND LASER PROJECTION APPARATUS
A laser device is provided. The laser device includes a bottom plate, a frame body, a heat sink and a light-emitting chip. The light-emitting chip is located on a surface of the heat sink away from the bottom plate. The light-emitting chip includes a plurality of first protrusions and/or a plurality of first depressions, the plurality of first protrusions and/or the plurality of first depressions are located on a first surface of the light-emitting chip; the heat sink includes a plurality of second depressions and/or a plurality of second protrusions, the plurality of second depressions and/or the plurality of second protrusions are located on a second surface of the heat sink; the plurality of first protrusions are located in the plurality of second depressions, and the plurality of second protrusions are located in the plurality of first depressions.