In some embodiments, a semiconductor structure includes: a first region comprising a first epitaxial oxide material; a second region comprising a second epitaxial oxide material; and a chirp layer located between the first and the second regions. The chirp layer can include alternating layers of a plurality of wide bandgap epitaxial oxide material layers (WBG layers) and a plurality of narrow bandgap epitaxial oxide material layers (NBG layers), wherein thicknesses of the NBG layers and the WBG layers change throughout the chirp layer. The WBG layer can comprise (Al.sub.x1Ga.sub.1−x1).sub.y1O.sub.z1, wherein x1 is from 0 to 1, wherein y1 is from 1 to 3, and wherein z1 is from 2 to 4. The NBG layer can comprise (Al.sub.x2Ga.sub.1x−2).sub.y2O.sub.z2, wherein x2 is from 0 to 1, wherein y2 is from 1 to 3, and wherein z2 is from 2 to 4, and wherein x1 and x2 are different from one another.

In some embodiments, a semiconductor structure includes: a first epitaxial oxide semiconductor layer; a metal layer; and a contact layer adjacent to the metal layer, and between the first epitaxial oxide semiconductor layer and the metal layer. The contact layer can include an epitaxial oxide semiconductor material. The contact layer can also include a region comprising a gradient in a composition of the epitaxial oxide semiconductor material adjacent to the metal layer, or a gradient in a strain of the epitaxial oxide semiconductor material over a region adjacent to the metal layer.

Integrated circuitry is fabricated from semiconductor layers formed on a substrate, which include at least one n-type layer, an inverted p-type modulation doped quantum well (mod-doped QW) structure, a non-inverted n-type mod-doped QW structure, and at least one p-type layer including a first P+-type layer formed below a second P-type layer. An etch operation exposes the second p-type layer. P-type ions are implanted into the exposed second p-type layer. A gate electrode of a n-channel HFET device is formed in contact with the p-type ion implanted region. Source and drain electrodes of the n-channel HFET device are formed in contact with n-type ion implanted regions formed in contact with the n-type mod-doped QW structure. P-channel HFET devices, complementary BICFET devices, stacked complementary HFET devices and circuits and/or logic gates based thereon, and a variety of optoelectronic devices and optical devices can also be formed as part of the integrated circuitry.

A semiconductor laser (1) is provided that includes a semiconductor layer sequence in which an active zone for generating laser radiation is located. A ridge waveguide is formed as an elevation from the semiconductor layer sequence. An electrical contact layer is located directly on the ridge waveguide. A metallic electrical connection region is located directly on the contact layer and is configured for external electrical connection of the semiconductor laser. A metallic breakage coating extends directly to facets of the semiconductor layer sequence and is arranged on the ridge waveguide. The breakage coating is electrically functionless and includes comprises a lower speed of sound for a breaking wave than the semiconductor layer sequence in the region of the ridge waveguide.

A length L.sub.1 of a first distributed Bragg reflector in a waveguide direction, a length L.sub.2 of a distributed feedback active region in the waveguide direction, a length L.sub.3 of a second distributed Bragg reflector in the waveguide direction, and a position x.sub.ps of a phase shift portion are set to satisfy correlations of x.sub.ps=L.sub.1+L.sub.2×α, L.sub.2(1−α)+L.sub.3>x.sub.ps, and 0.5<α<1. Further, the position x.sub.ps is a position of the phase shift portion in the waveguide direction with an end portion thereof on the first distributed Bragg reflector side set as an origin.

A germanium waveguide is formed from a P-type silicon substrate that is coated with a heavily-doped N-type germanium layer and a first N-type doped silicon layer. Trenches are etched into the silicon substrate to form a stack of a substrate strip, a germanium strip, and a first silicon strip. This structure is then coated with a silicon nitride layer.

A semiconductor optical device that achieves both of heat dissipation and light confinement and permits efficient current injection or application of an electric field is implemented. The semiconductor optical device includes: a core layer including an active region (1) made of a compound semiconductor; two cladding layers (5, 6) injecting current into the core layer; and a third cladding layer (4) made of a material having a larger thermal conductivity, a smaller refractive index, and a larger band gap than a material for any of the core layer and the two cladding layers.

Provided is a tunable laser that prevents basic characteristics of the laser from deteriorating and enables a high-speed control of the oscillation wavelength. The tunable laser includes a semiconductor gain portion including a III-V compound semiconductor, an optical feedback portion configured to diffract light generated in the semiconductor gain portion and feed the diffracted light back to the semiconductor gain portion, and an optical modulation portion including an optical waveguide that contains doped indirect transition-type silicon. The semiconductor gain portion and the optical modulation portion are disposed so that optical modes thereof overlap each other, and the semiconductor gain portion includes an embedded active layer thin film of a type in which a current is injected in a lateral direction.

A laser includes a substrate, first and second claddings, a gain medium, and multiple supports. The first cladding is spaced apart from the substrate by an air gap. A thickness of the first cladding in a vertical direction is in a range from 0.05-0.15 micrometers. The gain medium is disposed on the first cladding opposite the air gap. The second cladding is disposed on the gain medium opposite the first cladding. A thickness of the second cladding in the vertical direction is in a range from 0.05-0.15 micrometers. The supports are coupled to each of the substrate, the first cladding, the gain medium, and the second cladding to retain the first cladding, the gain medium, and the second cladding spaced apart from the substrate.

A spot-size converter includes first and second waveguide structures. The first waveguide structure extends longitudinally along a waveguide axis from a first end to a second end and is configured to support a first optical mode at the first end. The second waveguide structure is formed within the first waveguide structure. The second waveguide structure extends longitudinally between the first end and the second end. The second waveguide structure is configured to support a second optical mode at the second end. The second optical mode has a different diameter than the first optical mode. The second waveguide structure includes a waveguide core that has a first cross-sectional area in a first plane normal to the waveguide axis at the first end and a second cross-sectional area in a second plane normal to the waveguide axis at the second end. The second cross-sectional area is larger than the first cross-sectional area.