Patent classifications
H01S5/18347
SURFACE EMITTING LASER
A surface emitting laser according to one embodiment of the present disclosure includes a mesa part including, in order, a first conductivity-type DBR layer, an active layer, a second conductivity-type DBR layer, and a second conductivity-type contact layer. The surface emitting laser further includes: a first conductivity-type contact layer provided in a region on the first conductivity-type DBR layer side in a positional relationship with respect to the mesa part; a first conductivity-type semiconductor layer that is disposed at a position opposed to the mesa part with the first conductivity-type contact layer interposed therebetween, and is in contact with the first conductivity-type contact layer, the first conductivity-type semiconductor layer having a lower impurity concentration than the first conductivity-type contact layer; a first electrode layer in contact with the first conductivity-type contact layer; and a second electrode layer in contact with the second conductivity-type contact layer.
SURFACE EMITTING LASER AND METHOD FOR MANUFACTURING THE SAME
A surface emitting laser includes a first reflective layer, an active layer provided on the first reflective layer, and a second reflective layer provided on the active layer. The first reflective layer, the active layer, and the second reflective layer form a mesa, and the mesa has an electrically insulating region and an electrically conductive region. The electrically insulating region is positioned at a center portion of the mesa in a surface direction, and the electrically conductive region includes the first reflective layer, the active layer, and the second reflective layer and is positioned outside the electrically insulating region in such a manner as to surround the electrically insulating region.
LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE
A light-emitting device according to an embodiment of the present disclosure includes: a semiconductor stack in which a first light reflection layer configured by an arsenic-based semiconductor layer including carbon as an impurity, an active layer, and a second light reflection layer are stacked; a first buffer layer provided on the first light reflection layer side of the semiconductor stack, having one face that faces the semiconductor stack and another face that is on an opposite side of the one face, and configured by a phosphorus-based semiconductor layer; and a second buffer layer provided at least between the first light reflection layer and the first buffer layer, and configured by an arsenic-based semiconductor layer including zinc or magnesium as an impurity.
VCSEL device with multiple stacked active regions
Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.
SURFACE-EMITTING SEMICONDUCTOR LIGHT-EMITTING DEVICE
A surface-emitting semiconductor light-emitting device includes a semiconductor substrate; a first semiconductor layer on a front surface of the semiconductor substrate, an active layer on the first semiconductor layer; a photonic crystal layer on the active layer, a second semiconductor layer on the photonic crystal layer, a first electrode on the second semiconductor layer; and a second electrode on a back surface of the semiconductor substrate. The photonic crystal layer includes a plurality of protrusions arranged along an upper surface of the active layer. The second electrode includes a planar contact portion contacting the back surface of the semiconductor substrate, and at least one fine wire contact portion extending into a surface-emitting region in the back surface of the semiconductor substrate. The light radiated from the active layer is externally emitted from the surface-emitting region. The fine wire contact portion is arranged in the surface-emitting region with rotationally asymmetric.
Semiconductor device including multiple distributed bragg reflector layers
A semiconductor device according to an embodiment may include a plurality of light emitting structures, a first electrode disposed around the plurality of light emitting structures, a second electrode disposed on an upper surface of the plurality of light emitting structures, a first bonding pad electrically connected to the first electrode, and a second bonding pad electrically connected to the second electrode. The plurality of light emitting structures may include a first light emitting structure that includes a first DBR layer of a first conductivity type, a first active layer disposed on the first DBR layer, and a second DBR layer of a second conductivity type disposed on the first active layer; and a second light emitting structure that includes a third DBR layer of the first conductivity type, a second active layer disposed on the third DBR layer, and a fourth DBR layer of the second conductivity type disposed on the second active layer. The first electrode may be electrically connected to the first DBR layer and the third DBR layer, and disposed between the first light emitting structure and the second light emitting structure. The second electrode may be electrically connected to the second DBR layer and the fourth DBR layer, and disposed on an upper surface of the second DBR layer and an upper surface of the fourth DBR layer.
REFLECTING MIRROR, VERTICAL CAVITY SURFACE EMITTING LASER, VERTICAL CAVITY SURFACE EMITTING LASER ARRAY, PROJECTOR, HEAD UP DISPLAY, MOVABLE BODY, HEAD MOUNT DISPLAY, OPTOMETRY APPARATUS, AND LIGHTING APPARATUS
A reflecting mirror includes a first film and a second film on the first film, and has a reflection band where a center wavelength is λ. The first film includes a layer having a first average refractive index and another layer having a second average refractive index higher than the first average refractive index. The second film includes a layer having a third average refractive index and another layer having a fourth average refractive index higher than the third average refractive index. A sum of optical film thicknesses of the two layers of the first film is λ/2. A sum of optical film thicknesses of the two layers of the second film is greater than or equal to (n+1)λ/2 (n is an integer greater than or equal to 1).
Surface Emitting Laser and Method for Manufacturing the Same
A columnar portion is formed by etching parts of an active layer and a first reflective layer. In this etching process, the columnar portion is formed by etching the first reflective layer to a position of a semiconductor layer. For example, it is etched to a thickness of approximately 3 μm.
Vertical cavity surface emitting laser including meta structure reflector and optical device including the vertical cavity surface emitting laser
A vertical cavity surface emitting laser includes a gain layer configured to generate light; a distributed Bragg reflector below the gains layer; and a meta structure reflector above the gain layer and comprising a plurality of nano structures having a sub wavelength dimension.
VERTICAL CAVITY SURFACE EMITTING LASER
A vertical cavity surface emitting laser includes a post provided at a major surface of a substrate and extending along a first axis intersecting the major surface of the substrate, and an electrode provided at an upper surface of the post and surrounding the first axis. The post includes a first distributed Bragg reflector, an active layer, a current confinement layer, and a second distributed Bragg reflector. The substrate, the first distributed Bragg reflector, the active layer, the current confinement layer, and the second distributed Bragg reflector are disposed in order in a direction of the first axis.