H01S5/222

METHOD FOR DESIGNING PHASE MODULATION LAYER AND METHOD FOR PRODUCING LIGHT-EMITTING ELEMENT

A method for designing a phase modulation layer of a light emitting element as an iPMSEL including a light emitting portion and the phase modulation layer optically coupled to the light emitting portion includes a generation step for generating a design pattern of the phase modulation layer. The phase modulation layer includes a base layer and a plurality of different refractive index regions having different refractive indices from the base layer and distributed two-dimensionally in a plane perpendicular to a thickness direction of the phase modulation layer.

Semiconductor laser and manufacturing method thereof
09979159 · 2018-05-22 · ·

In a semiconductor laser, a block layer is provided on both sides of a mesa-type semiconductor part having an n-type cladding layer, an active layer, and a p-type cladding layer. The block layer has: a p-type block layer formed on the side surface of the mesa-type semiconductor part and over a p-type semiconductor substrate; a high-resistance layer formed over the p-type block layer; and an n-type block layer formed over the high-resistance layer, which has a higher resistance than that of the p-type block layer. By providing the high-resistance layer between the p-type block layer and the n-type block layer, the thickness of the p-type block layer can be controlled and a leakage current (flow of a hole) can be reduced. Further, the distance between the n-type cladding layer and the n-type block layer can be secured, and hence a leakage current (flow of an electron) can be prevented.

Methods for fabricating light emitting devices

In an example, the present invention provides a method for fabricating a light emitting device configured as a Group III-nitride based laser device. The method also includes forming a gallium containing epitaxial material overlying the surface region of a substrate member. The method includes forming a p-type (Al,In,Ga)N waveguiding material overlying the gallium containing epitaxial material under a predetermined process condition. The method includes maintaining the predetermined process condition such that an environment surrounding a growth of the p-type (Al,In,Ga)N waveguide material is substantially a molecular N.sub.2 rich gas environment. The method includes maintaining a temperature ranging from 725 C to 925 C during the formation of the p-type (Al,In,Ga)N waveguide material, although there may be variations. In an example, the predetermined process condition is substantially free from molecular H.sub.2 gas.

HETEROGENEOUSLY INTEGRATED PHOTONIC PLATFORM WITH InGaP LAYERS
20240372332 · 2024-11-07 ·

A heterogenous device includes a passive waveguide structure and an active waveguide structure. The passive waveguide structure is attached to a substrate and includes a dielectric layer. The active waveguide structure is attached to a top surface of the passive waveguide structure and includes a quantum well layer overlying an InGaP layer. The InGaP layer provides n-contact functionality.

A heterogenous device includes a passive waveguide structure and an active waveguide structure. The passive waveguide structure is attached to a substrate and includes a semiconductor layer. The active waveguide structure is attached to a top surface of the passive waveguide structure and includes a quantum well layer overlying an InGaP layer. The InGaP layer provides n-contact functionality.

OPTICAL SEMICONDUCTOR DEVICE, OPTICAL MODULE, AND METHOD FOR MANUFACTURING OPTICAL SEMICONDUCTOR DEVICE
20180090910 · 2018-03-29 ·

Provided is an optical semiconductor device which has long-term reliability since a threshold current is small, and a relaxation oscillation frequency is high. An optical semiconductor device includes an InP semiconductor substrate, a lower mesa structure that is disposed above the InP semiconductor substrate, and includes a multiple quantum well layer, an upper mesa structure that is disposed on the lower mesa structure, and includes a cladding layer, a buried semiconductor layer that buries both side surfaces of the lower mesa structure, and an insulating film that covers both side surfaces of the upper mesa structure by being in contact with both side surfaces of the upper mesa structure, in which the lower mesa structure includes a first semiconductor layer, above the multiple quantum well layer, and the upper mesa structure includes a second semiconductor layer which is different from the cladding layer in composition, below the cladding layer.

Semiconductor laser having improved index guiding

A semiconductor laser includes a main body, a strip having a narrower width provided on the main body, and an active zone that generates light radiation, wherein surfaces of the main body laterally with respect to the strip and side surfaces of the strip are covered with an electrically insulating protective layer, an electrically conductive layer as a contact is provided on a top side of the strip, a cavity is provided between a side surface of the strip and the protective layer at least in a delimited section.

Semiconductor strip laser and semiconductor component

A semiconductor strip laser and a semiconductor component are disclosed. In embodiments the laser includes a first semiconductor region of a first conductivity type of a semiconductor body, a second semiconductor region of a second different conductivity type of the semiconductor body, at least one active zone of the semiconductor body configured to generate laser radiation between the first and second semiconductor regions. The laser further includes a strip waveguide formed at least in the second semiconductor region and providing a one-dimensional wave guidance along a waveguide direction of the laser radiation generated in the active zone during operation, a first electric contact on the first semiconductor region, a second electric contact on the second semiconductor region and at least one heat spreader dimensionally stably connected to the semiconductor body at least up to a temperature of 220 C., and having an average thermal conductivity of at least 50 W/m.Math.K.

SPLIT-ELECTRODE VERTICAL CAVITY OPTICAL DEVICE

A split electrode vertical cavity optical device includes an n-type ohmic contact layer, first through fifth ion implant regions, cathode and anode electrodes, first and second injector terminals, and p and n type modulation doped quantum well structures. The cathode electrode and the first and second ion implant regions are formed on the n-type ohmic contact layer. The third ion implant region is formed on the first ion implant region and contacts the p-type modulation doped QW structure. The fourth ion implant region encompasses the n-type modulation doped QW structure. The first and second injector terminals are formed on the third and fourth ion implant regions, respectively. The fifth ion implant region is formed above the n-type modulation doped QW structure and the anode electrode is formed above the fifth ion implant region.

OPTOELECTRONIC INTEGRATED CIRCUIT

A semiconductor device includes an n-type ohmic contact layer, cathode and anode electrodes, p-type and n-type modulation doped quantum well (QW) structures, and first and second ion implant regions. The anode electrode is formed on the first ion implant region that contacts the p-type modulation doped QW structure and the cathode electrode is formed by patterning the first and second ion implant regions and the n-type ohmic contact layer. The semiconductor device is configured to operate as at least one of a diode laser and a diode detector. As the diode laser, the semiconductor device emits photons. As the diode detector, the semiconductor device receives an input optical light and generates a photocurrent.

Method of manufacture for an ultraviolet laser diode

A method for fabricating a laser diode device includes providing a gallium and nitrogen containing substrate member comprising a surface region, a release material overlying the surface region, an n-type gallium and nitrogen containing material; an active region overlying the n-type gallium and nitrogen containing material, a p-type gallium and nitrogen containing material; and a first transparent conductive oxide material overlying the p-type gallium and nitrogen containing material, and an interface region overlying the first transparent conductive oxide material. The method includes bonding the interface region to a handle substrate and subjecting the release material to an energy source to initiate release of the gallium and nitrogen containing substrate member.