Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a charge pump stage having multiple charge storage elements arranged to provide multiple sets of voltages in alternating phases. The integrated circuit may include a voltage multiplexing stage having multiple multiplexers arranged to receive the multiple sets of voltages in the alternating phases. Each multiplexer may provide a selected voltage from the multiple sets of voltages based on a conversion ratio. The integrated circuit may include a voltage summing stage having multiple sampling charge storage elements arranged to receive the selected voltages from each multiplexer and provide an output voltage as a sum of the selected voltages received from each multiplexer.

A charge pump structure is disclosed. In an embodiment a regulated charge pump structure includes an output terminal configured to provide a regulated output voltage, a first charge pump configured to generate the output voltage as a function of an input supply voltage and a control circuit configured to limit a level of the output voltage and to generate a control voltage, wherein the level of the output voltage is controlled by the control voltage such that the output voltage does not exceed a threshold value.

The present disclosure relates to a non-volatile memory device and to a method for generating overvoltage values in such a memory device structured in a plurality of sub-arrays and including at least a decoding and sensing circuitry associated with each sub-array, a charge pump architecture for each sub-array including pump stages for increasing the value of an input voltage and obtaining an overvoltage output value, a control and JTAG interface in the memory device, and at least a registers block coupled to the charge pump architecture and driven by a logic circuit portion for receiving at least an activation signal selecting a specific charge pump architecture associated with a memory sub-array of the plurality of sub-arrays.

A circuit that increases input voltage to higher output voltage connected to a variable frequency drive in an appliance. Several switching arrangements, timing, and safety mechanisms are in place to assist. When the circuit experiences high draw, high voltage output values of circuit decrease over time, but different aspects of the circuit can be constructed so that the amount of time required at a higher voltage does not exceed the amount of time in which the high voltage output is provided.

In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.

An electrical stimulation device is provided. The electrical stimulation device includes a boost circuit, a voltage selecting circuit and a control circuit. The boost circuit generates a plurality of voltages, wherein the voltages have different voltage values. The voltage selecting circuit is coupled to the boost circuit and selects one voltage according to a reference voltage on a tissue impedance to generate an output voltage. The control circuit is coupled to the boost circuit and in response to electrical stimulation; it transmits a control signal to enable the boost circuit.

A DC-DC converter converts voltage from a battery source providing a voltage V.sub.in to a lower level. A four-level transistor stack selectively connects an input voltage and flying capacitor voltages to an output inductor. Stress reduction transistors limit the charging of the flying capacitors to V.sub.in/3. The stress reduction transistors can also limit switching transistor voltages to V.sub.in/3. Freewheel switches can be used to limit ringing in the output inductor.

A charge pump includes an intermediate node capacitively coupled to receive a first clock signal oscillating between a ground and positive supply voltage, the intermediate node generating a first signal oscillating between a first and second voltage. A level shifting circuit shifts the first signal in response to a second clock signal to generate a second signal oscillating between first and third voltages. A CMOS switching circuit includes a first transistor having a source coupled to an input, a second transistor having a source coupled to an output and a gate coupled to receive the second signal. A common drain of the CMOS switching circuit is capacitively coupled to receive the first clock signal. When positively pumping, the first voltage is twice the second voltage and the third voltage is ground. When negatively pumping, the first and third voltages are of opposite polarity and the second voltage is ground.

Circuits and methods for providing at least a startup voltage for reversed-operation unidirectional power converters or bi-modal power converters sufficient to power at least an auxiliary circuit of such power converters while the normal supply voltage to at least the auxiliary circuit is insufficient to enable operation of the auxiliary circuit. Embodiments of the invention utilize an initial startup charge pump circuit to create a suitable startup voltage while the normal supply voltage to the auxiliary circuit is less than a specified voltage V.sub.MIN. Embodiments of the present invention also provide additional benefits, including small size since the initial startup charge pump circuit omits the use of an inductor, and high efficiency since the initial startup charge pump circuit may be disabled when the normal supply voltage to the auxiliary circuit is equal to or greater than V.sub.MIN.

An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.