H02M3/135

SiC EPITAXIAL WAFER, SEMICONDUCTOR DEVICE, AND POWER CONVERTER

A SiC epitaxial wafer includes a SiC substrate and a SiC epitaxial layer disposed on the SiC substrate. The SiC epitaxial layer includes a high carrier concentration layer and two low carrier concentration layers having lower carrier concentration than the high carrier concentration layer, and being in contact with a top surface and a bottom surface of the high carrier concentration layer to sandwich the high carrier concentration layer. A difference in carrier concentration between the high carrier concentration layer and the low carrier concentration layers is 510.sup.14/cm.sup.3 or more and 210.sup.16/cm.sup.3 or less.

SiC EPITAXIAL WAFER, SEMICONDUCTOR DEVICE, AND POWER CONVERTER

A SiC epitaxial wafer includes a SiC substrate and a SiC epitaxial layer disposed on the SiC substrate. The SiC epitaxial layer includes a high carrier concentration layer and two low carrier concentration layers having lower carrier concentration than the high carrier concentration layer, and being in contact with a top surface and a bottom surface of the high carrier concentration layer to sandwich the high carrier concentration layer. A difference in carrier concentration between the high carrier concentration layer and the low carrier concentration layers is 510.sup.14/cm.sup.3 or more and 210.sup.16/cm.sup.3 or less.

Semiconductor Device with Surge Current Protection

A power inverter includes a bridge circuit including a first half-bridge and a second half-bridge, each half-bridge including a high-side device and a low-side device, and a gate driver circuit connected with each gate of the high-side device and low-side power device of the first and second half-bridges and operable to provide each gate with a respective voltage to control operation of the respective power device. The gate driver is operable to provide a first voltage which is higher than a first threshold voltage of the respective power device, and a second voltage which is higher than a surge threshold of the respective power device. The surge threshold is higher than the first threshold and defines the onset of a surge current operation area of the respective power device at which the power device becomes conducts a surge current that is larger than the rated current of the device.

Semiconductor Device with Surge Current Protection

A power inverter includes a bridge circuit including a first half-bridge and a second half-bridge, each half-bridge including a high-side device and a low-side device, and a gate driver circuit connected with each gate of the high-side device and low-side power device of the first and second half-bridges and operable to provide each gate with a respective voltage to control operation of the respective power device. The gate driver is operable to provide a first voltage which is higher than a first threshold voltage of the respective power device, and a second voltage which is higher than a surge threshold of the respective power device. The surge threshold is higher than the first threshold and defines the onset of a surge current operation area of the respective power device at which the power device becomes conducts a surge current that is larger than the rated current of the device.

POWER SUPPLY DEVICE AND METHOD FOR CONTROLLING POWER SUPPLY DEVICE

Provided is multi-phase interleaving control in a power supply device. In power control by the power supply device where the dead beat control is applied to the multi-phase interleaving, combined current of the multi-phase current values is used as control current in the multi-phase control based on the multi-phase interleaving, thereby achieving control independent of the number of the detectors and the control system independent of the number of phases, and further, this control current is used to perform constant current control, so as to prevent overshooting and undershooting. The power supply device has multi-phase interleaving control that performs multi-phase control using a plurality of phase current values, provided with an LC chopper circuit constituting a step-down chopper circuit that operates according to the multi-phase control of multi-phase interleaving, and a controller for performing step response control according to the multi-phase control of the LC chopper circuit.

Semiconductor device with surge current protection

A power device includes an active area having at least two switchable regions with different threshold voltages.

Semiconductor device with surge current protection

A power device includes an active area having at least two switchable regions with different threshold voltages.

Start-up of HVDC converters

A method and apparatus for start-up of a voltage source converter (VSC) which is connected to an energized DC link (DC+, DC). The VSC is connected to a first AC network via a first transformer and an AC isolation switch, the AC isolation switch being coupled between the first transformer and the AC network. The method involves using an auxiliary AC power supply to generate an AC supply to energize the first transformer with the AC isolation switch open. The VSC is then started, with a VSC controller using the AC supply generated by the auxiliary AC power supply as a reference for controlling the VSC. The auxiliary AC power supply may also be used to supply power to at least one VSC load, such as the controller and/or an auxiliary load such as a cooling system. Once the VSC is started the isolation switch 204 can be closed.

Apparatus and method for predicting fault state of inverter

Disclosed are an apparatus and a method for predicting a fault state of an inverter. The apparatus for predicting a fault state of an inverter includes: an inverter converting DC power into AC power; a switching element provided in the inverter; and a controller extracting a fault sign factor based on an output signal output from the inverter and predicting a fault of the switching element based on the fault sign factor.

RESISTOR BASED PHYSICAL UNCLONABLE FUNCTION
20240121113 · 2024-04-11 ·

A Physical Unclonable Function, PUF, apparatus is disclosed. The apparatus comprises a plurality of PUF cells that each comprise a first potential divider and a second potential divider. The apparatus also comprises a determination unit that comprises a selection unit for selecting at least one of the plurality of PUF cells, and a readout unit coupled to each selected PUF cell. The readout unit is configured to determine a PUF value for the selected PUF cell based on a difference between a first analog voltage at the first potential divider and a second analog voltage at the second potential divider.