A control circuit for a power factor correction (PFC) circuit, the control circuit includes a multiplier having first, second, and third multiplier inputs and a multiplier output. The control circuit has an adder having first and second inputs and an output. The first input of the adder is coupled to the multiplier output. The control circuit further includes a root mean square (RMS) calculation circuit configured to determine a square of a root mean square of an input sinusoidal voltage. The RMS calculation circuit has an output coupled to the second multiplier input. An input voltage square calculation circuit is configured to determine a square of the input sinusoidal voltage. The input voltage square calculation circuit has an output coupled to the third multiplier input.

The disclosure provides a power supply unit, including: a first high-frequency isolating converter including a first end connected to a first voltage, a second end and a third end; and a second high-frequency isolating converter including a first end connected to a second voltage, a second end and a third end, wherein the second end of the second high-frequency isolating converter and the second end of the first high-frequency isolating converter are connected in parallel to a first end of a first load, and the third end of the second high-frequency isolating converter and the third end of the first high-frequency isolating converter are connected in parallel to a second end of the first load. The disclosure further provides a loop power supply system having the power supply unit.

The disclosure provides a power supply unit, including: a first high-frequency isolating converter including a first end connected to a first voltage, a second end and a third end; and a second high-frequency isolating converter including a first end connected to a second voltage, a second end and a third end, wherein the second end of the second high-frequency isolating converter and the second end of the first high-frequency isolating converter are connected in parallel to a first end of a first load, and the third end of the second high-frequency isolating converter and the third end of the first high-frequency isolating converter are connected in parallel to a second end of the first load. The disclosure further provides a loop power supply system having the power supply unit.

An ideal diode circuit is described which uses an NMOS transistor as a low-loss ideal diode. The control circuit for the transistor is referenced to the anode voltage and not to ground, so the control circuitry may be low voltage circuitry, even if the input voltage is very high, referenced to earth ground. A capacitor is clamped to about 10-20 V, referenced to the anode voltage. The clamped voltage powers a differential amplifier for the detecting if the anode voltage is greater than the cathode voltage. The capacitor is charged to the clamped voltage during normal operation of the ideal diode by controlling the conductivity of a second transistor coupled between the cathode and the capacitor, enabling the circuit to be used with a wide range of frequencies and voltages. All voltages applied to the differential amplifier are equal to or less than the clamped voltage.

An ideal diode circuit is described which uses an NMOS transistor as a low-loss ideal diode. The control circuit for the transistor is referenced to the anode voltage and not to ground, so the control circuitry may be low voltage circuitry, even if the input voltage is very high, referenced to earth ground. A capacitor is clamped to about 10-20 V, referenced to the anode voltage. The clamped voltage powers a differential amplifier for the detecting if the anode voltage is greater than the cathode voltage. The capacitor is charged to the clamped voltage during normal operation of the ideal diode by controlling the conductivity of a second transistor coupled between the cathode and the capacitor, enabling the circuit to be used with a wide range of frequencies and voltages. All voltages applied to the differential amplifier are equal to or less than the clamped voltage.

The present disclosure provides a method and apparatus using a novel PWM switching technique that requires only one PWM carrier signal and benefits from two logic functions to provide switching signals and provides the flying capacitor (FC) voltage as well as dc-link capacitors voltages regulated to their desired values without external control. It may also, eliminate the odd multiples of the switching harmonic clusters from the output voltage is possible; double the frequency of first switching harmonic; reduce filtering efforts may be required since the values of the output LC filter inductor and capacitor can be very much reduced. Furthermore, notable reduction in control complexity is possible using the novel PWM method.

The present disclosure provides a method and apparatus using a novel PWM switching technique that requires only one PWM carrier signal and benefits from two logic functions to provide switching signals and provides the flying capacitor (FC) voltage as well as dc-link capacitors voltages regulated to their desired values without external control. It may also, eliminate the odd multiples of the switching harmonic clusters from the output voltage is possible; double the frequency of first switching harmonic; reduce filtering efforts may be required since the values of the output LC filter inductor and capacitor can be very much reduced. Furthermore, notable reduction in control complexity is possible using the novel PWM method.

A power conversion device suppresses voltage variation of a power supply bus. The device includes a variation compensation circuit and a control circuit. The variation compensation circuit includes: a first capacitor connected to the power supply bus; a second capacitor connected in series between the first capacitor and a ground; an auxiliary capacitor; and a converter including a switching element and having a voltage step-down function, the converter being connected to the second capacitor and the auxiliary capacitor. The control circuit includes a proportional resonant control section having a peak gain for variation with a frequency ω.sub.0 which is twice a frequency of the single-phase alternating current. The control circuit uses the proportional resonant control section to generate a signal for controlling the switching element.

A power conversion device suppresses voltage variation of a power supply bus. The device includes a variation compensation circuit and a control circuit. The variation compensation circuit includes: a first capacitor connected to the power supply bus; a second capacitor connected in series between the first capacitor and a ground; an auxiliary capacitor; and a converter including a switching element and having a voltage step-down function, the converter being connected to the second capacitor and the auxiliary capacitor. The control circuit includes a proportional resonant control section having a peak gain for variation with a frequency ω.sub.0 which is twice a frequency of the single-phase alternating current. The control circuit uses the proportional resonant control section to generate a signal for controlling the switching element.

A load control device for controlling power delivered from an alternating-current power source to an electrical load may comprise a controllably conductive device, a control circuit, and an overcurrent protection circuit that is configured to be disabled when the controllably conductive device is non-conductive. The control circuit may be configured to control the controllably conductive device to be non-conductive at the beginning of each half-cycle of the AC power source and to render the controllably conductive device conductive at a firing time during each half-cycle (e.g., using a forward phase-control dimming technique). The overcurrent protection circuit may be configured to render the controllably conductive device non-conductive in the event of an overcurrent condition in the controllably conductive device. The overcurrent protection circuit may be disabled when the controllably conductive device is non-conductive and enabled after the firing time when the controllably conductive device is rendered conductive during each half-cycle.