This application discloses a boost power conversion circuit, a method, an inverter, an apparatus, and a system. In the conversion circuit, a voltage control circuit is added on a three-level boost. The voltage control circuit can be connected in series in a third closed loop, and the third closed loop is a loop including an inductor, a first switching transistor, a flying capacitor, a second diode, and an input end. The voltage control circuit clamps a voltage of a common point of the first diode and the second diode when a voltage on an input end of the boost power conversion circuit is less than a startup voltage of the boost power conversion circuit. The voltage borne by the second diode is reduced, so that a diode with relatively small voltage stress can be selected.

An active clamp flyback circuit includes: a clamp capacitor that is connected to a primary-side winding of a transformer and that is configured to absorb leakage inductance energy of the primary-side winding; an auxiliary switching transistor that is configured to control the clamp capacitor to perform reverse excitation power charging on the primary-side winding by using the auxiliary switching transistor; a first diode, where the first diode is connected in series between the clamp capacitor and the auxiliary switching transistor; and a second diode, where the second diode is connected between the first diode and the clamp capacitor , and the second diode is connected in series between the clamp capacitor and a primary-side auxiliary winding.

A bidirectional direct current converter includes a controller that controls a switching transistor in the bidirectional direct current converter to reduce an inductance of an inductor, thereby reducing a size and costs of the inductor, and further reducing a size and costs of the entire bidirectional direct current converter. The bidirectional direct current converter further includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, and a capacitor. The controller is coupled to the first switching transistor, the second switching transistor, the third switching transistor, and the fourth switching transistor. The controller performs complementary control on the first switching transistor and the third switching transistor, and performs complementary control on the second switching transistor and the fourth switching transistor.

A control circuit for controlling a multi-level buck converter having N pairs of switches serially connected between an input terminal and a logic ground, wherein N is an integer equal to or greater than 2. The control circuit has a comparing circuit, a selecting circuit and a delay circuit. The comparing circuit compares a voltage feedback signal indicative of an output voltage signal of the multi-level buck converter with a reference signal to generate a comparing signal. The selecting circuit generates N set signals based on the comparing signal. The delay circuit delays the N set signals to provide N delay set signals to control the N pairs of switches when the output voltage signal falls in

[00001]$\left(1\pm k\%\right)⨯\frac{1}{N}$

of an input voltage signal of the multi-level buck converter,

[00002]$\left(1\pm k\%\right)⨯\frac{2}{N}$

of the input voltage signal, . . . , or

[00003]$\left(1\pm k\%\right)⨯\frac{N-1}{N}$

of the input voltage signal, wherein k is a proportional coefficient.

A power conversion circuit is provided. According to the topologies of power conversion circuits and the corresponding control manners of the present disclosure, the output voltage is greatly reduced relative to the input voltage, and thus the function of voltage reduction is achieved. Moreover, a voltage-second product of the time and the voltage across the first output inductor and a voltage-second product of the time and the voltage across the second output inductor are both greatly reduced. Accordingly, the inductance, volume and loss of the first output inductor and the second output inductor are greatly reduced. Therefore, the voltage regulation module may receive the low output voltage outputted by the power conversion circuit, thereby reducing the overall volume of the voltage regulation module and increasing the power conversion density and conversion efficiency of the voltage regulation module.

Unique systems, methods, techniques and apparatuses of zero-voltage transition pulse width modulation resonant converters are disclosed. One exemplary embodiment is a zero-voltage transition PWM resonant converter comprising a DC bus, a first switching device, a second switching device, a resonant tank circuit, an auxiliary circuit having a flying capacitor and a plurality of auxiliary switching devices, and a controller. The controller is structured to control the first switching device, the second switching device, and the plurality of auxiliary switching devices to provide resonant operation of the tank circuit effective to provide a substantially zero voltage condition across the first switching device when turning the first switching device on or off and to provide a substantially zero voltage condition across the second switching device when turning the second switching device on or off.

A charging circuit can include: a first module having a plurality of power transistors, and being coupled between a first port and a reference ground; a second module having a plurality of power transistors, and being coupled between a second port and the reference ground; at least one inductor coupled between the first module and the second module; and where at least one of the first module and the second module forms a multi-level converter with the at least one inductor.

A converter comprises a first switch, a second switch, a first blocking device and a second blocking device connected in series between two terminals of an output capacitor, an inductor coupled between a dc input source and a common node of the second switch and the first blocking device and a capacitor coupled between a common node of the first switch and the second switch, and a common node of the first blocking device and the second blocking device, wherein a voltage across the capacitor is configured to be adjustable through adjusting duty cycles of the first switch and the second switch.

A switching converter circuit comprises an inductive circuit element; a driver switching circuit configured to provide energy to the inductive circuit element to generate an output voltage of the switching converter circuit, the output voltage having an alternating current (AC) signal component and a direct current (DC) signal component; a current sensing circuit configured to generate a current sense signal representative of inductor current of the inductive circuit element, wherein an output of the current sensing circuit is coupled to a bias circuit node; and a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.

A controller switches between modes each having a different connection state of a DC power supply and the capacitor with respect to first and second output points by controlling switches. A generation unit generates a reference wave including at least one carrier wave. The modes are classified into a sustaining mode in which no current is caused to flow to the capacitor, a charging mode in which a current is caused to flow to the capacitor, and a discharging mode in which a current in a direction opposite to that in the charging mode is caused to flow to the capacitor. The controller switches between the sustaining mode and a charging or discharging mode according to the comparison result between a signal wave and the reference wave.