Patent classifications
H03F1/0222
Envelope tracking power amplifier apparatus
An envelope tracking (ET) power amplifier apparatus is provided. The ET power amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on an ET voltage and a tracker circuit configured to generate the ET voltage based on an ET target voltage. The ET power amplifier apparatus also includes a control circuit. The control circuit is configured to dynamically determine a voltage standing wave ratio (VSWR) change at a voltage output relative to a nominal VSWR and cause an adjustment to the ET voltage. By dynamically determining the VSWR change and adjusting the ET voltage in response to the VSWR change, the amplifier circuit can operate under a required EVM threshold across all phase angles of the RF signal.
Digital predistortion of signals
Systems, circuitries, and methods for predistorting a digital signal in a transmit chain based on a predistortion function are provided. A method includes shifting a center frequency of an input signal by an offset to generate an adapted signal; predistorting the adapted signal based on a predistortion function to generate a predistorted adapted signal; reverting the shifting of the center frequency of the predistorted adapted signal by the offset to generate a predistorted signal; and causing transmission of the predistorted signal by a transmit chain.
Transmission Setting Selection
An apparatus is disclosed for transmission setting selection. In an example aspect, an apparatus includes a wireless interface device with a communication processor and a radio-frequency front-end. The communication processor is configured to provide a signal. The radio-frequency front-end is coupled to the communication processor and configured to accept the signal. The radio-frequency front-end includes an amplifier configured to amplify the signal based on one or more amplifier settings. The wireless interface device is configured to adjust the one or more amplifier settings responsive to an output power being changed with a gain being unchanged.
POWER AMPLIFIER WITH PROTECTION LOOPS
A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop or the over-voltage protection loop contribute to an over-current protection signal.
DIGITAL PREDISTORTION OF SIGNALS
Systems, circuitries, and methods for predistorting a digital signal in a transmit chain based on a predistortion function are provided. A method includes shifting a center frequency of an input signal by an offset to generate an adapted signal; predistorting the adapted signal based on a predistortion function to generate a predistorted adapted signal; reverting the shifting of the center frequency of the predistorted adapted signal by the offset to generate a predistorted signal; and causing transmission of the predistorted signal by a transmit chain.
Systems and methods for adaptive generation of high power electromagnetic radiation and their applications
Disclosed are systems for adjusting bias power provided to a radio-frequency amplifier to one or more figures of merit based on sensed characteristics of the amplifier and/or characteristics of the input or output power. The systems may be used in terrestrial and satellite based communications and radar, among other possibilities.
APPARATUS FOR OPTIMIZED TURN-OFF OF A CASCODE AMPLIFIER
An apparatus for turning off a cascode amplifier having a common-gate transistor and a common-source transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a drain-voltage from the drain of the common-source transistor when the common-source transistor is switched to a first OFF state and produce a first feedback signal. The drain-voltage is equal to a source voltage of the common-gate transistor and the drain-voltage increases in response to switching the common-source transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first gate-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first gate-voltage and a second gate-voltage. The common-gate transistor is configured to switch to a second OFF state in response to receiving the second gate-voltage.
TECHNIQUES FOR BANDWIDTH-LIMITED ENVELOPE TRACKING USING DIGITAL POST DISTORTION
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may transmit a capability message indicating a capability of the UE to perform bandwidth-limited envelope tracking or a capability of the UE to compensate for bandwidth-limited envelope tracking distortion. The UE may receive a request for the UE to activate bandwidth-limited envelope tracking or a request for the UE to compensate for bandwidth-limited envelope tracking distortion. In some examples, the UE may transmit an uplink message using a bandwidth-limited envelope tracking configuration. In other examples, the UE may receive a downlink message and use digital post distortion (DPoD) to correct bandwidth-limited envelope tracking distortions in the downlink message. Aspects of the present disclosure may enable the UE to use bandwidth-limited envelope tracking and DPoD for wideband signal transmissions, which may result in lower power consumption at the UE.
DYNAMIC OPTIMIZATION OF TRANSISTOR ARRAY IN POWER AMPLIFIER
Dynamic optimization of transistor array in power amplifier. In some embodiments, a power amplification system can include a power amplifier including an array of transistors, with the array configured to receive an input signal and provide an amplified signal. The power amplification system can further include a monitoring system including a plurality of sensing circuits implemented at respective locations of the array, and a control system configured to obtain sensed information from the plurality of sensing circuits, and based on the information, generate a pattern of one or more transistor properties over the array to allow operation of the array in a desired manner based on the pattern.
PHASE AND AMPLITUDE ERROR CORRECTION IN A TRANSMISSION CIRCUIT
Phase and amplitude error correction in a transmission circuit is provided. The transmission circuit includes a transceiver circuit, a power management integrated circuit (PMIC), and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from an input vector, the PMIC generates a modulated voltage, and the power amplifier circuit(s) amplifies the RF signal(s) based on the modulated voltage. When the power amplifier circuit(s) is coupled to an RF front-end circuit, unwanted amplitude-amplitude (AM-AM) and amplitude-phase (AM-PM) errors may be created across a modulation bandwidth of the transmission circuit. In this regard, in embodiments disclosed herein, the input vector is equalized based on multiple complex filters to thereby cause the AM-AM and AM-PM errors to be corrected in the transmission circuit. As a result, it is possible to reduce undesired instantaneous excessive compression and/or spectrum regrowth across the modulation bandwidth of the transmission circuit.