H03F3/3018

CHARGE AMPLIFIER CIRCUIT WITH A HIGH OUTPUT DYNAMIC RANGE FOR A MICROELECTROMECHANICAL SENSOR
20200252035 · 2020-08-06 ·

A charge amplifier circuit is provided. The charge amplifier circuit is couplable to a transducer that generates an electrical charge that varies with an external stimulus. The charge amplifier circuit includes an amplification stage having an input node, couplable to the transducer, and an output node. The amplification stage biases the input node at a first direct current (DC) voltage. The charge amplifier circuit includes a feedback circuit, which includes a feedback capacitor, electrically coupled between the input and output nodes of the amplification stage. The feedback circuit includes a resistor electrically coupled to the input node, and a level-shifter circuit, electrically coupled between the resistor and the output node. The level-shifter circuit biases the output node at a second DC voltage and as a function of a difference between the second DC voltage and a reference voltage.

MUTE MECHANISM WITH REDUCED POP NOISE IN AUDIO AMPLIFIER SYSTEMS AND METHODS
20200220502 · 2020-07-09 ·

Systems and methods are provided for improved noise performance of audio amplifiers. In one example, a system includes a multistage amplifier comprising at least a first stage amplifier and a second stage amplifier. The system further includes a plurality of switches disposed within the multistage amplifier to configure the multistage amplifier. The system further includes a control signal configured to control the multistage amplifier to a normal amplification mode or a mute state, wherein the multistage amplifier is adapted to amplify an input signal in the normal amplification mode, the multistage amplifier is adapted to output a zero signal in the mute state, and internal amplification stages of the multistage amplifier are disabled in the mute state, and output stages of each of the at least first stage amplifier and the second stage amplifier are electrically shorted and/or shorted to a fixed bias voltage in the mute state.

METHODS AND APPARATUS FOR AN AMPLIFIER CIRCUIT

Various embodiments of the present technology may comprise methods and apparatus for an amplifier circuit. Methods and apparatus for an amplifier circuit according to various aspects of the present invention may comprise a first cross-connect circuit configured to receive an input signal at an input terminal and transmit the input signal to an input stage circuit. The amplifier circuit may further comprise a second cross-connect circuit connected between the input stage circuit and an output stage circuit, and a voltage adjustment circuit connected to the input stage circuit. Each cross-connect circuit may comprise a plurality of switches.

Operational amplifier circuit
09953980 · 2018-04-24 · ·

In an output amplifier stage of an operational amplifier circuit, the first p-well of the first nMOSFET and the second p-well of the second nMOSFET are connected to the fourth node. Further, the first n-well of the first pMOSFET and the second n-well of the second pMOSFET are connected to the fifth node. At least one of the fourth node and the fifth node is connected to an output terminal VOUT.

OPERATIONAL AMPLIFIER CIRCUIT
20170213831 · 2017-07-27 · ·

In an output amplifier stage of an operational amplifier circuit, the first p-well of the first nMOSFET and the second p-well of the second nMOSFET are connected to the fourth node. Further, the first n-well of the first pMOSFET and the second n-well of the second pMOSFET are connected to the fifth node. At least one of the fourth node and the fifth node is connected to an output terminal VOUT.

Slew rate acceleration circuit and buffer circuit including the same
12255654 · 2025-03-18 · ·

A slew rate acceleration circuit in a buffer circuit, is configured at least to detect a current flowing through a load stage of the buffer circuit, compare a value of the detected current with a reference value, and supply an adjusting driving voltage to an output stage of the buffer circuit based on results of the comparison for increasing a slew rate of the buffer circuit.