The present invention provides a differential signal offset adjustment circuit, wherein first and second transistors are respectively coupled between a power supply line and a first current source, and between the power supply line and a second current source. First and second resistors are respectively coupled between the first transistor and a first variable current source, and between the second transistor and a second variable current source. Third and fourth transistors are respectively coupled between a third resistor and a third current source, and between a fourth resistor and a fourth current source, and have input terminals respectively coupled to the first and second resistors. Fifth and sixth transistors are respectively coupled between the power supply line and a fifth current source, and between the power supply line and a sixth current source, and have input terminals respectively coupled to the third and fourth transistors. A fifth resistor is coupled between the third and fourth current sources.

Certain aspects of the present disclosure provide methods and apparatus for amplifying an input signal. One example apparatus is a differential amplifier that includes a positive input node, a negative input node, a positive output node, a negative output node, a positive input transistor having a gate coupled to the positive input node and having a drain coupled to the negative output node, a negative input transistor having a gate coupled to the negative input node and having a drain coupled to the positive output node, a first common-gate amplifier having an output coupled to the negative output node, a second common-gate amplifier having an output coupled to the positive output node, a first capacitive element coupled between the negative input node and an input of the first common-gate amplifier, and a second capacitive element coupled between the positive input node and an input of the second common-gate amplifier.

A differential amplifier circuit includes a first transistor, a second transistor, a field effect transistor (FET) connected between the first transistor and the second transistor, a first current source connected to the first transistor, a second current source connected to the second transistor, and a control circuit. The first transistor and the second transistor generate a differential output signal in accordance with an input signal and a reference signal. The control circuit includes a first resistor and a second resistor connected in series between the drain and the source of the FET, a center node between the first resistor and the second resistor, a third resistor connected between the gate of the FET and the center node, and a variable current source. The variable current source supplies a control current to the third resistor in accordance with a gain control signal. The control circuit controls on-resistance of the FET.

Embodiments of a linear equalizer are disclosed. In an embodiment, a linear equalizer includes a plurality of input transistors, a plurality of gain control transistors and first and second impedance elements. The plurality of input transistors is connected to input terminals of the linear equalizer to receive input signals. The plurality of gain control transistors is connected between a supply voltage and the plurality of input transistors. The plurality of gain control transistors is also connected to gain control terminals to receive gain control signals. At least some of the gain control transistors are connected to output terminals of the linear equalizer to transmit output signals. The first and second impedance elements are connected between at least some of the input transistors and at least one fixed voltage. A peaking gain of the linear equalizer is defined by gain control signals applied to the gain control terminals.

An exemplary embodiment of the invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; and a downstream amplifier stage having a first output unit and a second output unit; wherein the first output unit is connected to the first output port of the differential preamplifier and the second output unit is connected to the second output port of the differential preamplifier; and wherein a negative impedance converter is electrically located in at least one of said differential preamplifier and said downstream amplifier stage.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

An amplifier circuit comprises a differential input stage and a differential output stage. The differential input stage includes a first differential input transistor pair coupled to a differential input of the amplifier circuit, and a second differential input transistor pair coupled to the differential input and the differential output stage; a degeneration impedance coupled between first transistors of the first and second differential input transistor pairs and second transistors of the first and second differential input transistor pairs; and a feedback circuit coupled to the first and second differential input transistor pairs and the degeneration impedance, wherein output current is provided from the differential input stage to the differential output stage by the feedback circuit and transition current is provided to the output stage by the second differential input transistor pair.

An exemplary embodiment of the invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; and a downstream amplifier stage having a first output unit and a second output unit; wherein the first output unit is connected to the first output port of the differential preamplifier and the second output unit is connected to the second output port of the differential preamplifier; and wherein a negative impedance converter is electrically located in at least one of said differential preamplifier and said downstream amplifier stage.

Disclosed herein is a circuit including a differential amplifier having a pair of input transistors coupled in a differential arrangement between adjustable current sources and receiving input differential signals from a pair of input voltage regulators. The adjustable current sources are configured to source more current to the pair of input transistors than current that is sunk from the pair of input transistors. A first amplifier has inputs coupled to receive differential output voltages from the differential amplifier. A second amplifier has inputs coupled to receive amplified differential output voltages from the first amplifier. A low pass filter has inputs coupled to receive further amplified differential output voltages from the second amplifier and produce final differential output voltages.

A linear amplifier outputs differential signals corresponding to differential signals input to a first signal input terminal and a second signal input terminal, and includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third transistor, a fourth transistor, a differential amplifier, and a signal processing circuit. The signal processing circuit includes a first transistor and a second transistor, and includes a resistor as a common voltage output part that outputs a common voltage. The differential amplifier receives the common voltage and a reference voltage, and applies a voltage corresponding to the voltage difference between the common voltage and the reference voltage to the control terminals of the transistors.