A sensor device is provided including: an electric wire; a semiconductor device including an inductor and an amplifier, the inductor being configured to detect a magnetic field generated around the electric wire, the amplifier including a bipolar element configured to amplify a voltage generated at the inductor; and a substrate on which the first semiconductor device and the electric wire are arranged such that the first semiconductor device is apart from the electric wire by at least a given distance. In a plan view of the substrate, the electric wire does not overlap the first semiconductor device.

At least some embodiments are directed to a system that comprises a differential input transistor pair (DITP) comprising first and second transistors, a first feedback loop coupled to the first transistor, and a second feedback loop coupled to the second transistor. When a differential voltage applied to the input stage is within a first range, the first and second feedback loops control a tail current supplied to the DITP, where the tail current at least partially determines a transconductance of the DITP. When the differential voltage is within a second range, the transconductance of the DITP is at least partially determined by a first resistor in the first feedback loop or by a second resistor in the second feedback loop.

Techniques for limiting the output voltage of an amplifier without directly affecting an output current of the amplifier are provided. In an example, an amplifier can include a plurality of amplifier stages configured to receive an input voltage and to provide an output voltage as a function of the input voltage, and a comparator configured to receive a voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.

Various technologies pertaining to a high-impedance current source are described herein. The current source outputs a substantially constant current by way of a first transistor that draws current from a supply. The current source is configured to feed back noise from the supply to a feedback resistor at an input of an operational amplifier (op-amp) by way of a second transistor. The feedback resistor and the op-amp are configured such that responsive to receiving the supply noise feedback, the op-amp drives a gate voltage of the first transistor to cause the first transistor to reject the supply noise and cause the output of the current source to remain substantially constant.

A voltage driver circuit for an output stage of an operational amplifier, or other circuits, includes a level shifter and an output driver including a source follower and a common source amplifier in a push-pull configuration. The level shifter generates a node voltage as a function of an input voltage on the input node. The output driver including a first transistor having a control terminal receiving the node voltage, and connected between a supply voltage and an output node, and a second transistor having a control terminal receiving the input voltage from the input node, and connected between the output node and a reference voltage, wherein the first and second transistors have a common conductivity type.

Provided herein are amplifiers, such as buffers, with increased headroom. An amplifier stage includes a follower transistor and current source configured to receive a power supply voltage comprising an alternating current component and a direct current component. The alternating current component of the power supply voltage has substantially the same frequency and magnitude as the input signal received by the follower transistor. In radio frequency (RF) and intermediate frequency (IF) buffer applications, for example, the increased headroom can allow for linear buffering of an input signals with increased amplitude so that the output power one decibel (OP1dB) compression point can be increased.

At least some embodiments are directed to a system that comprises a differential input transistor pair (DITP) comprising first and second transistors, a first feedback loop coupled to the first transistor, and a second feedback loop coupled to the second transistor. When a differential voltage applied to the input stage is within a first range, the first and second feedback loops control a tail current supplied to the DITP, where the tail current at least partially determines a transconductance of the DITP. When the differential voltage is within a second range, the transconductance of the DITP is at least partially determined by a first resistor in the first feedback loop or by a second resistor in the second feedback loop.

A transistor cell can be modeled as a transistor with a collector, a base, and an emitter operating with a current at the collector to produce a minimum transconductance in the transistor cell that increases a current gain and improves at least one operating characteristic of the transistor cell. The operating characteristics include bandwidth, gain, and output power.

A driver that drives an optical device, such as laser diode (LD) and/or optical modulator, is disclosed. The driver includes a variable gain amplifier (VGA) and a post amplifier. The post amplifier amplifies an output of the VGA to a preset amplifier as varying the gain of the VGA. The VGA includes two differential pairs each amplify the input signal oppositely in phases thereof and outputs of the differential pairs are compositely provided to the post amplifier. The gain of the VGA is varied by adjusting contribution of the second differential pair to the output of the VGA.

A bias circuit includes a first transistor and a second transistor configured as a first current mirror. A first current source is arranged between a supply node and the first transistor first terminal. A bias circuit output is coupled to the second transistor second terminal. A second current mirror is coupled to the first current mirror and the bias circuit output. A second current source is arranged between the supply node and the second current mirror. A third transistor in a diode-connected configuration is coupled between the first transistor second terminal and a ground. Alternatively or in addition, the bias circuit includes a first variable capacitor coupled between the second transistor first terminal and the second transistor second terminal. A fourth transistor has a control terminal coupled to the supply node, a first terminal coupled to the supply node and a second terminal coupled to the second transistor first terminal.