An electronic circuit is provided. The electronic circuit includes a first current generating circuit configured to output a first operating current based on a first operating voltage; and an input circuit configured to: receive a first current corresponding to a first input voltage and a second current corresponding to a second input voltage, wherein the first current and the second current are based on the first operating current; receive a third current and a fourth current that are generated based on the first operating voltage; and generate a fifth current corresponding to the second input voltage based on a second operating current. The electronic circuit is configured to generate an output voltage that is associated with a difference between the first input voltage and the second input voltage based on the second current, the fourth current and the fifth current, and the fourth current corresponds to the third current.

Voltage regulator circuitry includes a first element, a second element, an amplifier and a reference voltage source. The first element converts an input voltage and outputs a predetermined output voltage. The second element outputs a current in proportion to a current based on the outputted voltage from the first element. The amplifier amplifies a differential voltage between a reference voltage and a voltage in proportion to the output voltage, the amplifier which controls the first element based on the differential voltage. The reference voltage source outputs the reference voltage which adapts to a comparison between the current outputted from the second element and a reference current.

The present disclosure relates to a differential input circuit, an amplifier circuit, and a display device. The differential input circuit comprises: a first power module, a second power module, a first shunt module, a second shunt module, a first output module, and a second output module. The first power module is controlled to output a first signal, a second signal, and a third signal through a first bias signal, and the second power module receives the first signal, and outputs a fourth signal and a fifth signal through a differential input signal. The first shunt module, the second shunt module, the first output module, and the second output module are controlled by the differential input signal so that the first output module and the second output module output signals under the control of the differential input signal.

Embodiments of the disclosure are drawn to apparatuses and methods for testing the resistance of through silicon vias (TSVs) which may be used, for example, to couple multiple memory dies of a semiconductor memory device. A force amplifier may selectively provide a known current along a mesh wiring structure and through the TSV to be tested. The force amplifier may be positioned on a vacant area of the memory device, while the mesh wiring structure may be positioned in an area beneath the TSVs of the layers of the device. A chopper instrumentation amplifier may be selectively coupled to the TSV to be tested to amplify a voltage across the TSV generated by the current passing through the TSV. The chopper instrumentation amplifier may be capable of determining small resistance values of the TSV.

An adaptive feedback method for use in a memory device is provided. The memory device includes a first input-receiver circuit and a plurality of second input-receiver circuits. The method includes the steps of: providing a clock signal and an inverted clock signal to the first input-receiver circuit; generating an enable control signal by the first input-receiver circuit to control a first feedback path in the first input-receiver circuit; in response to the frequency of the clock signal and the inverted clock signal being higher than or equal to a predetermined frequency, activating the first feedback path in the first input-receiver circuit according to the enable control signal; and in response to the frequency of the clock signal and the inverted clock signal being lower than the predetermined frequency, deactivating the first feedback path in the first input-receiver circuit according to the enable control signal.

An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.

An internal power supply for an amplifier is disclosed. The internal power supply floats according to a common mode voltage at the input to the amplifier and according to an input voltage at an input stage of the amplifier. Powering the input stage of the amplifier using the floating supply allows for the use of low voltage devices even when the range of possible common mode voltages includes high voltages. The use of low voltage devices can correspond to performance improvement for the amplifier and can help reduce the size of the amplifier. The internal supply can accommodate both positive and negative common mode voltages and can be used for current sense amplifiers of any gain.

A receiver front-end circuit and an operating method thereof are disclosed. The receiver front-end circuit includes a common-mode suppression circuit and a rear-stage circuit. The common-mode suppression circuit is used to receive an external input common-mode voltage signal and perform common-mode noise suppression processing on the external input common-mode voltage signal, and then output an internal input common-mode voltage signal. The rear-stage circuit is coupled to the common-mode suppression circuit and used to receive the internal input common-mode voltage signal. The dynamic swing of the internal input common-mode voltage signal is smaller than the dynamic swing of the external input common-mode voltage signal.

Embodiments relate to systems, methods, and computer-readable media to enable design and creation of receiver circuitry. One embodiment is a receiver apparatus comprising a plurality of receiver arrangements, each receiver arrangement having a sampling circuit and a multi-stage differential amplifier connected to the sampling circuit. Each receiver arrangement is configurable via switches between an amplifying mode and an autozero mode. Control circuitry may select output data from a sampling circuit of one or more receiver arrangements that are not in autozero mode. In various embodiments, settings for individual receiver arrangements may be set based on decision feedback equalization (DFE).

A receiver circuit includes a first amplifier circuit, a second amplifier circuit, and a selector circuit. The first amplifier circuit is configured to receive a pair of receiving signals. The second amplifier circuit is configured to receive the pair of receiving signals. Based on a selection signal, the first amplifier circuit generates a pair of first amplifying signals according to the pair of receiving signals or the second amplifier circuit generates a pair of second amplifying signals according to the pair of receiving signals. The selector circuit is configured to output the pair of first amplifying signals or the pair of second amplifying signals according to the selection signal.