A physically unclonable function device includes a set of diode-connected MOS transistors having a random distribution of respective threshold voltages. A first circuit is configured to impose, on each first transistor, a fixed respective gate voltage regardless of the value of a current flowing in this first transistor. A second circuit is configured to impose, on each second transistor, a fixed respective gate voltage regardless of the value of a current flowing in this second transistor. A current mirror stage is coupled between the first circuit and the second circuit and is configured to deliver the reference current from a sum of the currents flowing in the first transistors. A comparator is configured to deliver a signal whose level depends on a comparison between a first current obtained from a reference current based on the first transistors and a second current of the second transistors.

A memory device includes a voltage generator configured to generate a reference voltage for transmission to at least one component of the memory device. The voltage generator includes a first input to receive a first signal having a first voltage value. The voltage generator also includes a second input to receive a second signal having a second voltage value. The voltage generator further includes a first circuit configured to generate third voltage and a second circuit coupled to the first circuit to receive the third voltage value, wherein the second circuit receives the first signal and the second signal and is configured to utilize the third voltage value to facilitate comparison of the first voltage value and the second voltage value to generate an output voltage.

A circuit for startup of a multi-stage amplifier circuit includes a pair of input nodes and at least two output nodes configured to be coupled to a multi-stage amplifier circuit. A startup differential stage includes a differential pair of transistors having respective control terminals coupled to the pair of input nodes, and each transistor in the differential pair of transistors has a respective current path therethrough between a respective output node and a common source terminal. The startup differential stage is configured to sense a common mode voltage drop at a first differential stage of the multi-stage amplifier circuit. Current mirror circuitry includes a plurality of transistors coupled to the common terminal of the differential pair of transistors and coupled to two output nodes of the at least two output nodes.

A linear power supply circuit, includes: output transistor between input terminal where input voltage is applied and output terminal where output voltage is applied; a driver driving the output transistor based on difference between voltage based on the output voltage and reference voltage; and phase compensation circuit, wherein the driver includes differential amplifier outputting voltage corresponding to the difference between the voltage based on the output voltage and the reference voltage, a first capacitance having one end where output of the differential amplifier is applied and the other end where ground potential is applied, a converter converting the voltage based on the output of the differential amplifier into current, and a current amplifier amplifying the current output from the converter, and wherein the phase compensation circuit lowers gain of transfer function of the linear power supply circuit and output capacitor connected to the output terminal.

Voltage-to-current converters that include two current mirrors are disclosed. In an example voltage-to-current converter each current mirror is a complementary current mirror in that one of its input and output transistors is a P-type transistor and the other one is an N-type transistor. Such voltage-to-current converters may be implemented using bipolar technology, CMOS technology, or a combination of bipolar and CMOS technologies, and may be made sufficiently compact and accurate while operating at sufficiently low voltages and consuming limited power.

Devices and methods include voltage buses. The devices also include one or more power amplifiers coupled to the voltage bus. Each of the one or more power amplifiers include one or more transistors. The devices also include a model that is configured to emulate leakage from at least one of the one or more transistors. A current mirror with a first transistor coupled to the model and a second transistor coupled to the voltage bus. The current mirror is configure to draw charge from the voltage bus based at least in part on the emulated leakage from the model.

A physically unclonable function device includes a set of diode-connected MOS transistors having a random distribution of respective threshold voltages. A first circuit is configured to impose, on each first transistor, a fixed respective gate voltage regardless of the value of a current flowing in this first transistor. A second circuit is configured to impose, on each second transistor, a fixed respective gate voltage regardless of the value of a current flowing in this second transistor. A current mirror stage is coupled between the first circuit and the second circuit and is configured to deliver the reference current from a sum of the currents flowing in the first transistors. A comparator is configured to deliver a signal whose level depends on a comparison between a first current obtained from a reference current based on the first transistors and a second current of the second transistors.

An analog-to-digital converter (“ADC”) includes an input terminal configured to receive an analog input voltage signal. A first ADC stage is coupled to the input terminal and is configured to output a first digital value corresponding to the analog input voltage signal and a first analog residue signal corresponding to a difference between the first digital value and the analog input signal. An inverter based residue amplifier is configured to receive the first analog residue signal, amplify the first analog residue signal, and output an amplified residue signal. The amplified residue signal is converted to a second digital value, and the first and second digital values are combined to create a digital output signal corresponding to the analog input voltage signal.

Disclosed is an operational amplifier, including a first-stage gain circuit, a second-stage gain circuit, and a tail current compensation circuit. The first-stage gain circuit is connected to the second-stage gain circuit, the first-stage gain circuit is provided with an input terminal, the second-stage gain circuit is provided with an output terminal. The first-stage gain circuit at least includes a tail current source, a first terminal of the tail current compensation circuit is connected to the tail current source, and a second terminal of the tail current compensation circuit is connected to the output terminal of the second-stage gain circuit. The tail current compensation circuit is configured to compensate the tail current source with an output signal of the output terminal of the second-stage gain circuit.

Monitoring circuitry, comprising: a current monitoring unit operable to monitor a speaker current flowing through a speaker and generate a monitor signal indicative of that current; and a controller operable, based on a control signal, to control the current monitoring unit to control whether the monitor signal is generated and/or a property of the monitor signal.