H03F3/45381

DRIVER WITH DISTRIBUTED ARCHITECTURE
20180062589 · 2018-03-01 ·

A distributed driver for an optic signal generator has a first amplifier cell with one or more amplifiers configured to receive and amplify an input signal to create a first amplified signal. A second amplifier cell has one or more amplifiers configured to receive and amplify the input signal to create a second amplified signal. A first conductive path and second conductive path connects to the first amplifier cell and the second amplifier cell such that the inductance associated with the first and second conductive path counteracts a capacitance associated with the first amplifier cell and the second amplifier cell. A variable capacitor may be part of the first amplifier cell and/or the second amplifier cell to selectively tune the capacitance of the distributed driver. A distributed bias circuit may be part of the first amplifier cell and/or the second amplifier cell to bias an optic signal transmitter.

Low power comparator

A comparator is presented. The comparator includes an input port for receiving an input voltage; an output port for providing an output voltage; a resistive divider, first and second transistors, and a differential amplifier. The resistive divider has a first node for providing a first voltage and a second node for providing a second voltage. The first transistor has a control terminal coupled to the first node, a first terminal coupled to the input port, and a second terminal coupled to a common node. The second transistor has a control terminal coupled to the second node, a first terminal coupled to the input port, and a second terminal coupled to the common node. The differential amplifier has a first input coupled to the first terminal of the first transistor, a second input coupled to the first terminal of the second transistor and an output coupled to the output port.

CMOS compatible near-infrared sensor system
12484321 · 2025-11-25 · ·

A surface plasmon-based photodetector includes: a silicon substrate; a grating in contact with a surface of the silicon substrate, in which the grating forms a Schottky diode with the semiconductor substrate; and a complementary-metal-oxide-semiconductor (CMOS) sample and hold stage as well as an analog-to-digital circuit (ADC) in the silicon substrate and arranged to detect electrical current generated at the Schottky diode.