An analog discrete current mode negative feedback amplifier circuit for use with a micro-fused strain gauge is disclosed. The amplifier circuit includes a Wheatstone bridge coupled to a first power supply and a second power supply. The first power supply and the second power supply can be configured such that the periodically alternate between two voltage levels. The Wheatstone bridge can be coupled to a negative feedback amplifier circuit with common mode detection. The amplifier circuit can comprise a differential amplifier with a negative feedback configuration coupled to a common mode amplifier. In addition, the output of each of the amplifiers can be coupled to a common-mode amplifier. In a pressure sensing application, the output of the common mode amplifier serves to output the temperature while the differential amplifiers serve to output the pressure.

Various embodiments of the present technology may provide methods and apparatus for an amplifier integrated circuit. The amplifier integrated circuit may provide two amplifiers, one amplifier set to a low gain bandwidth product to amplify at a higher speed and the other amplifier set to a high gain bandwidth product to amplify at a lower speed. The amplifier integrated circuit may further provide a switching circuit connected to the amplifiers, wherein the switching circuit is responsive to a control signal and operates to selectively activate the high speed amplifier and the low speed amplifier in sequence.

An isolation amplification circuit having an input stage circuitry and a control circuitry stage interconnected through a galvanic isolation barrier. The input stage circuitry includes a first filter network and a second filter network for supplying first and second output signals in response to the application of first and second electrical input signals. The input stage circuitry includes a first feedback path configured for applying a first feedback signal to a common node of the first filter network to close a first feedback loop around the first filter network and a second feedback path configured for applying a second feedback signal to a common node of the second filter network to close a second feedback loop around the second filter network.

A circuit includes an analog-to-digital converter (ADC). The circuit also includes an analog front end (AFE) having an AFE input and an AFE output. The AFE output is coupled the ADC's input. The AFE includes a programmable gain amplifier (PGA) having a first PGA input and a second PGA input. The PGA includes a first operational amplifier (OP AMP) with first and second OPAMP inputs. The AFE also including a programmable resistance circuit having a first programmable resistance circuit input and first and second programmable resistance circuit outputs. The first programmable resistance circuit input is coupled to the first and second PGA inputs. The programmable resistance circuit includes a resistor network having first and second balance resistances. The first balance resistance is coupled to the first and second OP AMP inputs, and the second balance resistance is coupled to the first and second OP AMP inputs.

A sensor circuit includes a sensor array. The sensor array includes a sensor row that includes a first sensor cell, a second sensor cell, and an output stage of a distributed amplifier circuit. The first sensor cell includes a first photodetector, and a first preamplifier stage of the distributed amplifier circuit. The first preamplifier stage is coupled to the first photodetector, and is configured to amplify a signal received from the first photodetector. The second sensor cell includes a second photodetector, and a second preamplifier stage of the distributed amplifier circuit. The second preamplifier stage is coupled to the second photodetector, and is configured to amplify a signal received from the second photodetector. The output stage of the distributed amplifier circuit is coupled to the first and second sensor cells, and is configured to amplify a signal received from the first preamplifier stage and the second preamplifier stage.

Various embodiments of the present technology may provide methods and apparatus for an amplifier integrated circuit. The amplifier integrated circuit may provide two amplifiers, one amplifier set to a low gain bandwidth product to amplify at a higher speed and the other amplifier set to a high gain bandwidth product to amplify at a lower speed. The amplifier integrated circuit may further provide a switching circuit connected to the amplifiers, wherein the switching circuit is responsive to a control signal and operates to selectively activate the high speed amplifier and the low speed amplifier in sequence.

A fingerprint sensing circuit and a fingerprint sensing apparatus are provided. The fingerprint sensing circuit includes a sensing electrode; a first converting circuit connected to the sensing electrode and configured to convert a coupling capacitance sensed by the sensing electrode into a drive voltage, where the drive voltage is equal to a sum of a voltage variation converted from the coupling capacitance and a reference voltage; and a second converting circuit configured to generate a sensing current based on the drive voltage, and send the sensing current to a fingerprint signal processor, where the sensing current is equal to a product of a transconductance gain of the second converting circuit and the voltage variation, and the fingerprint signal processor performs fingerprint sensing based on the sensing current. With the fingerprint sensing circuit and the fingerprint sensing apparatus, the detection accuracy can be improved.

A sensor circuit includes a sensor array. The sensor array includes a sensor row that includes a first sensor cell, a second sensor cell, and an output stage of a distributed amplifier circuit. The first sensor cell includes a first photodetector, and a first preamplifier stage of the distributed amplifier circuit. The first preamplifier stage is coupled to the first photodetector, and is configured to amplify a signal received from the first photodetector. The second sensor cell includes a second photodetector, and a second preamplifier stage of the distributed amplifier circuit. The second preamplifier stage is coupled to the second photodetector, and is configured to amplify a signal received from the second photodetector. The output stage of the distributed amplifier circuit is coupled to the first and second sensor cells, and is configured to amplify a signal received from the first preamplifier stage and the second preamplifier stage.

Frequency selective analog front-end circuitry, used to convert a sensed charge signal to an analog voltage is disclosed. In one aspect, the frequency selective analog front-end circuitry includes an op-amp having an output, an inverting input and a noninverting input, a first resistor connected between the terminal of the first capacitor and the inverting input of the op-amp, a second capacitor connected between the output of the op-amp and the inverting input of the op-amp, a second resistor connected between the output of the op-amp and the inverting input of the op-amp, a third capacitor connected between the terminal of the first capacitor and the noninverting input of the op-amp, and a third resistor connected between the noninverting input of the op-amp and a reference voltage.

Various embodiments of the present technology may provide methods and apparatus for an amplifier integrated circuit. The amplifier integrated circuit may provide a low gain bandwidth product to amplify at a higher speed and a high gain bandwidth product to amplify at a lower speed. The amplifier integrated circuit may achieve the low and high gain bandwidth product by generating a first current and a second current through a plurality of sets of series-connected transistors and operating a plurality of switches.