The power amplifying device includes a first potential line to which a first potential is supplied, a second potential line to which a second potential that is lower than the first potential is supplied and a third potential line to which a third potential that is between the first potential and the second potential is supplied. The power amplifying device includes a first BTL amplifier unit. The power amplifying device includes a second BTL amplifier unit. The power amplifying device includes a third BTL amplifier unit. The power amplifying device includes a fourth BTL amplifier unit that has a seventh output amplifier and an eighth output amplifier.

A logarithmic amplifier includes programmable gain amplifiers each having a different gain, wherein an input of each of the programmable gain amplifiers is coupled to an input of the logarithmic amplifier; and a summing circuit having inputs coupled to a corresponding output of each of the programmable gain amplifiers and an output coupled to an output of the logarithmic amplifier, wherein the summing circuit generates a logarithmic transfer function having piecewise linear segments.

Disclosed are a high-linearity low-noise amplifier, a chip, and an electronic device. The low-noise amplifier comprises a primary-stage amplification unit, at least one secondary-stage amplification unit, a drive unit, a configurable load unit, an input impedance matching unit and an output impedance matching unit, and further comprises a switched capacitor branch; wherein the input end of the at least one secondary-stage amplification unit is connected via the switched capacitor branch to the input end of the primary-stage amplification unit, and the input end of the secondary-stage amplification unit is provided with an independent bias voltage; in a low-gain operating mode, the switched capacitor branch is closed, and at the same time, a secondary amplification unit path connected to the switched capacitor branch is opened.

An integrated circuit (IC), comprising: a first gain stage configured to apply a first gain to a first signal to generate a first gain adjusted signal; a first converter configured to convert the first gain adjusted signal to a first converted signal; a second gain stage configured to apply a second gain to the first converted signal to generate a second gain adjusted signal; and a controller configured to coordinate changes in a first gain of the first gain stage and a second gain of the second gain stage to prevent transients in the second gain adjusted signal.