Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

An improved method of providing high burst power to audio amplifiers from limited power sources, using parallel power paths to increase system efficiency without need for a power path controller, thus utilizing a simplified circuit operation and maximizing average power available for both the amplifier and supporting circuitry.

Wireless receivers and related methods with interferer immunity are disclosed. The receiver includes a receive (RX) front-end, a power level detector, and an automatic gain controller (AGC). The RX front-end includes circuit(s) having variable gains, and the power level detector outputs a power level indicator. The AGC receives the power level indicator and outputs the gain settings to the variable-gain circuits within the RX front-end. Further, the AGC is configured to adjust the gain settings within a first gain range when not receiving data frames and to adjust them within a second gain range when receiving data frames. The second gain range is a restricted version of the first gain range. Further, the AGC can be configured to detect and store gain settings within a sliding time window when data frames are not being received and to use these stored gain settings to determine the second gain range.

In a gain control device, a gain control voltage adjust circuit includes a time-constant circuit and outputs an adjusted gain control voltage depending on an adjustment signal and a control voltage generated by a differential amplifier upon input of the adjustment signal. An adjustment signal generation circuit outputs the adjustment signal during an adjustment signal output period. This period is a specified period before a first burst signal is output from a signal output unit and where a burst signal is not output from the signal output unit. The adjustment signal is to make the adjusted gain control voltage closer to a target voltage. The target voltage is a gain control voltage output from the gain control voltage adjust circuit and corresponding to a steady part of a second burst signal. The second burst signal is a burst signal output before the first burst signal.

An output power control device includes: an attenuator to attenuate power of a high-frequency signal output from an oscillator; a high-frequency power amplifier to amplify the power of the high-frequency signal output from the attenuator; a monitor circuit to monitor the power of the high-frequency signal output from the high-frequency power amplifier; and a controller to control an attenuation amount of the attenuator based on the monitor signal output from the monitor circuit or based on attenuation amount setting data from a data unit. The oscillator generates the high-frequency signal in synchronization with a trigger signal. The controller starts control of the attenuation amount of the attenuator based on the attenuation amount setting data, in synchronization with the trigger signal, and, after receiving the monitor signal, the controller controls the attenuation amount of the attenuator based on the monitor signal.

A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.

The present invention is directed to systems and methods for reducing noise levels by harmonization in a DCC-DAS using smart weighted aggregation of noise and signal resources to achieve an optimal signal to noise ratio in varying traffic and interference conditions.

A radiofrequency (RF) amplifier includes an input terminal, an output terminal, and a power supply and biasing stage having an output coupled to the input terminal. An amplification stage of the RF amplifier includes a first transistor having a control terminal coupled to the input terminal and a first conduction terminal coupled to the output terminal. The power supply and biasing stage is configured to generate a bias voltage at the control terminal of the first transistor to simultaneously regulate a power supply voltage of the amplification stage to a first voltage and a bias current of the amplification stage to a first current.

A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.

An output power stabilization circuit includes: a first variable attenuator for attenuating a high-frequency signal inputted thereto; a second variable attenuator for attenuating the high-frequency signal outputted from the first variable attenuator; an output power detection circuit for monitoring the high-frequency signal outputted from the second variable attenuator and outputting an output power detection signal; a temperature monitoring circuit for outputting a temperature monitoring signal; a control circuit for outputting a first control signal for controlling the attenuation amount in the first variable attenuator and a second control signal for controlling the attenuation amount in the second variable attenuator, based on an output power setting signal and the temperature monitoring signal, by referring to previously stored table data; and an attenuation amount setting circuit for making comparison between the first control signal and the output power detection signal and outputting a first attenuation amount adjustment signal for adjusting the attenuation amount in the first variable attenuator.