An acoustic wave device includes a package substrate including first and second principal surfaces, an acoustic wave element at the first principal surface, a sealing resin layer covering at least a portion of the acoustic wave element, and a metal shield film covering the sealing resin layer. The package substrate includes a ground connection electrode in the package substrate, electrically connected to the acoustic wave element, and connected to a ground potential. The package substrate includes a side surface and a connection portion connected to at least a portion of an end edge on a side with the second principal surface in the side surface and at least a portion of an outer peripheral edge in the second principal surface. The shield film reaches the side surface of the package substrate and does not reach the connection portion, and the shield film is connected to the ground connection electrode.

An electronic device and a method of forming the same are disclosed. An emitter resonator and a reception cap cavity are formed on and in a first wafer, and an emitter cap cavity and a reception resonator are formed in and on a second wafer. After bonding together the first and second wafers, an emitter filter is formed in an emission region, and a reception filter is formed in a receiving region. The method provided in the present invention not only can simplify the fabrication process of the device and improve its accuracy and stability, but also facilitates integration of the emitter and receives filters in a same chip, which results in a higher degree of integration of the device and a more compact package size thereof.

A method for fabricating an array of front ends for an array of packaged electronic components that each comprise: an electrical element packaged within a package comprising a front part of a package comprising an inner section with a cavity therein opposite the resonator defined by the raised frame and an outer section sealing said cavity; and a back part of the package comprising a back cavity in an inner back section, and an outer back section sealing the cavity, said back package further comprising a first and a second via through the back end around said at least one back cavity for coupling to front and back electrodes of the electronic component; the vias terminating in external contact pads that are coupleable in a ‘flip chip’ configuration to a circuit board; the method comprising the stages of: i. Obtaining a carrier substrate having an active membrane layer attached thereto by its rear surface, with a front electrode on the front surface of the active membrane layer; ii. Obtaining an inner front end section; iii. Attaching the inner front end section to the exposed front surface of the front electrode; iv. Detaching the carrier substrate from the rear surface of the active membrane layer; v. Optionally thinning the inner front section; vi. Processing the rear surface by removing material to create an array of at least one island of active membrane on at least one island of front electrode; vii. Creating an array of at least one front cavity by selectively removing at least outer layer of the inner front end section, such that there is one cavity opposite each island of membrane on the front side of the front electrode on the opposite side to the island of active membrane; viii. Applying an outer front end section to the inner front end section and bonding the outer front end section to an outer surface of the inner front end section such that the outer front end section spans across and seals the at least one cavity of the array of front cavities.

An elastic wave device includes an interdigital transducer electrode and a wiring electrode made of metal and provided on a first main surface of a piezoelectric substrate. Via hole electrodes penetrate the piezoelectric substrate. Each via hole electrode is connected to an external connection terminal. A cover member defines a hollow space in which the interdigital transducer electrode is sealed, together with the first main surface of the piezoelectric substrate. A heat dissipating member is provided on the wiring electrode to extend from the wiring electrode toward the cover member and penetrate the cover member.

An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

A structure and method for integrating a crystal resonator with a control circuit are disclosed. The crystal resonator is integrated with both the control circuit (110) and a semiconductor die (900) on a single device wafer (100) through forming a piezoelectric vibrator (500) on, and bonding the semiconductor die (900) to, a back side of the device wafer (100). This allows an increased degree of integration of the crystal resonator and on-chip modulation of its parameters. Compared with traditional crystal resonators, the disclosed crystal resonator is more compact in size and hence less power-consuming.

A structure and method for integrating a crystal resonator with a control circuit are disclosed. The resonator is formed by forming a lower cavity (120) in the device wafer (100) containing the control circuit (110) and a piezoelectric vibrator (200) on a front side (100U) of the device wafer (100) and by fabricating a cap layer (420) using planar fabrication processes, which encloses the piezoelectric vibrator (200) within an upper cavity (400). In addition, a semiconductor die (500) may be bonded to a back side (100D) of the device wafer (100), helping in additionally increasing the integration of the crystal resonator and allowing on-chip modulation of the crystal resonator's parameters. In this way, in addition to being able to integrate with other semiconductor components more easily with a higher degree of integration, the crystal resonator is more compact in size and less power-consuming.

A structure and method for integrating a crystal resonator with a control circuit are disclosed. A piezoelectric vibrator (500) is formed on a back side of a device wafer (100) containing the control circuit, and planar fabrication processes are utilized to form a cap layer (720) which encloses the piezoelectric vibrator (500) within an upper cavity (700). Additionally, a semiconductor die (900) can be bonded to a front side of the device wafer (100). In addition to an increased degree of integration of the crystal resonator due to such integration with both the control circuit (110) and the semiconductor die (900), this also allows on-chip modulation of the crystal resonator's parameters. Moreover, compared with traditional crystal resonators, the resulting crystal resonator is more compact in size and hence less power-consuming.

A substrate that includes an encapsulation layer, a first acoustic resonator, a second acoustic resonator, at least one first dielectric layer, a plurality of first interconnects, at least one second dielectric layer, and a plurality of second interconnects. The first acoustic resonator is located in the encapsulation layer. The first acoustic resonator includes a first piezoelectric substrate comprising a first thickness. The second acoustic is located in the encapsulation layer. The second acoustic resonator includes a second piezoelectric substrate comprising a second thickness that is different than the first thickness. The at least one first dielectric layer is coupled to a first surface of the encapsulation layer. The plurality of first interconnects is coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located at least in the at least one first dielectric layer.

Acoustic resonator devices and filters are disclosed. An acoustic resonator chip includes a piezoelectric plate attached to a substrate, a portion of the piezoelectric plate forming a diaphragm spanning a cavity in the substrate. A first conductor pattern formed on a surface of the piezoelectric plate includes an interdigital transducer with interleaved fingers on the diaphragm, and a first plurality of contact pads. A second conductor pattern is formed on a surface of an interposer, the second conductor pattern including a second plurality of contact pads. Each pad of the first plurality of contact pads is directly bonded to a respective pad of the second plurality of contact pads. A seal is formed between a perimeter of the acoustic resonator chip and a perimeter of the interposer.