A filter circuit for generating a filtered signal includes a first filter unit, a second filter unit, and a negative feedback resistor. The first filter unit includes a signal input unit that receives signals, a signal output unit that outputs the filtered signals, and a non-ideal integrator and a first ideal integrator that are connected in series between the signal input unit and the signal output unit. The second filter unit includes an ideal integrator that is negative feedback-connected to the non-ideal integrator or the first ideal integrator. The negative feedback resistor is connected between the signal output unit and the signal input unit of the first filter unit.

The ABB blocks 332, 334, 336, and 318 are configured to process the I/Q signals corresponding to the first or the second HB independently or the I/Q signals corresponding to the LB in cooperation by two. In detail, the first ABB I block 332 and the first ABB Q block 334 operate independently in the 3G/4G mode but they are configured to process the I signal (or Q signal) of the LB in the 2G mode. Likewise, the second ABB Q block 336 and the second ABB I block 318 operate independently in the 3G/4G mode but they are configured to process the Q signal (or I signal) of the LB in the 2G mode. The first ABB I/Q blocks 332 and 334 and the second ABB I/Q blocks 336 and 318 are arranged symmetrically to processing the I/Q signals cooperatively in the 2G mode. In detail, the second ABB Q block 336 is arranged close to the first ABB Q block 334 such that the capacitor regions included in the first ABB I/Q blocks 332 and 334 are connected to each other and the capacitor regions included in the second ABB I/Q blocks 336 and 338 are connected to each other.

According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.

A method and apparatus for minimizing transmit signal interference is provided. The method includes the steps of: receiving a signal and amplifying the received signal. The received signal is then mixed with an intermediate frequency signal to obtain a baseband modulated signal. The baseband modulated signal is first filtered in an RC filter. The resulting signal is then divided by a preselected amount and the first divided portion is sent to a main path of a biquad filter, which produces a first stage biquad filtered signal. The second portion of the divided signal is sent to an auxiliary path of the biquad filter, and produces a second filtered signal. The first and second signals are then recombined and sent to the second stage of the biquad filter, where further filtering takes place.

A filter circuit for generating a filtered signal includes a first filter unit, a second filter unit, and a negative feedback resistor. The first filter unit includes a signal input unit that receives signals, a signal output unit that outputs the filtered signals, and a non-ideal integrator and a first ideal integrator that are connected in series between the signal input unit and the signal output unit. The second filter unit includes an ideal integrator that is negative feedback-connected to the non-ideal integrator or the first ideal integrator. The negative feedback resistor is connected between the signal output unit and the signal input unit of the first filter unit.

A band-pass filter circuit includes a low-pass filter, a high-pass filter including an integrator, and a controller. The controller is configured to increase a cut-off frequency of the high-pass filter for a predetermined period of time, when changing a gain of the low-pass filter. Further, the controller is configured to increase a cut-off frequency of the low-pass filter or decrease a Q value of the low-pass filter for the predetermined period of time.