A polyphase decimation FIR filter apparatus including a modulo integrator circuit configured to integrate input samples and to provide integrated input samples; and a polyphase FIR filter circuit configured to process the integrated input samples, the polyphase FIR filter circuit including a plurality of multiplier accumulator circuits, each configured to accumulate products of coefficients and respective integrated signal samples, wherein each of the multiplier accumulator circuits receives a subset of FIR filter coefficients, wherein the FIR filter coefficients are derived as the nth difference of original filter coefficients, where n is a number of integrators in the integrator circuit, and wherein the FIR filter circuit is configured to perform computation operations with modulo arithmetic.

A polyphase decimation FIR filter apparatus including a modulo integrator circuit configured to integrate input samples and to provide integrated input samples; and a polyphase FIR filter circuit configured to process the integrated input samples, the polyphase FIR filter circuit including a plurality of multiplier accumulator circuits, each configured to accumulate products of coefficients and respective integrated signal samples, wherein each of the multiplier accumulator circuits receives a subset of FIR filter coefficients, wherein the FIR filter coefficients are derived as the nth difference of original filter coefficients, where n is a number of integrators in the integrator circuit, and wherein the FIR filter circuit is configured to perform computation operations with modulo arithmetic.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

A parallel transfer rate converter inputs first parallel data with number of samples being S1 pieces in synchronism with a first clock, and outputs second parallel data with number of samples being S2=S1(m/p) pieces (p is an integer equal to or larger than 1) in synchronism with a second clock having a frequency which is p/m times of a frequency of the first clock. A convolution operation device inputs the second parallel data in synchronism with the second clock, generates third parallel data with number of samples being S3=S2(n/m) pieces (S3 is an integer equal to or larger than 1) by executing a convolution operation with a coefficient indicating a transmission characteristic to the second parallel data, and outputs the third parallel data in synchronism with the second clock.

Data samples are filtered by using a digital filter where the length of an impulse response of the digital filter is finite, an impulse response of the digital filter is symmetric and the operation of the digital filter is multi-rate. The method uses a polyphase decomposition to break down the input data stream into N parallel substreams and the multi-rate digital filter is separated by a polyphase decomposition into multiple lower-rate sub-filters where each of the sub-filters is separated into a set of simpler sub-sub-filters which operate upon the same set of input samples and which have impulse responses which are jointly centro-symmetric, a set of pre-filtering arithmetic structures, and a set of post-filtering arithmetic structures and performing each such pair of sub-sub-filtering operations using a single shared filter structure, a set of pre-filtering combining adders, and a set of post-filtering separating adders.

The present document relates to the design of anti-aliasing and/or anti-imaging filters for resamplers using rational resampling factors. In particular, the present document relates to a method for implementing such anti-aliasing and/or anti-imaging filters with reduced computational complexity. In addition, the present document relates to further aspects of an audio encoding and decoding system, such as the phase relation between the channels of a multi-channel audio signal and/or the structure of the bitstream of an encoded audio signal.

An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

An apparatus and method are disclosed for filtering an audio signal. The apparatus includes an analysis filter bank, a high frequency reconstructor or parametric stereo processor, and a synthesis filter bank. The analysis filterbank receives real-valued time domain input audio samples and generates complex valued subband samples. The high frequency reconstructor or parametric stereo processor modifies at least some of the complex valued subband samples. The synthesis filter bank receives the modified complex valued subband samples and generates time domain output audio samples. The analysis filter bank comprises analysis filters that are complex exponential modulated versions of a prototype filter with an arbitrary phase shift to reduce a complexity of the filter bank.

An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

The document relates to modulated digital filter banks, as well as to methods and systems for the design of such filter banks. In particular, the document discloses a method comprising accessing a time-domain audio signal and applying a first filter bank to the time-domain audio signal, thereby producing a first plurality of subbands of frequency-domain audio data representative of at least a part of the audio signal. The filter bank comprises an decimated modulated filter bank obtained from an asymmetric prototype filter. The method further comprises applying a second filter bank to at least a first subband of the first plurality of subbands of frequency-domain audio data, thereby producing a second plurality of subbands of frequency-domain audio data representative of at least a part of the audio signal. The second modulated filter bank comprises an asymmetric modulated filter bank which includes no decimation. The method further comprises outputting at least the second plurality of subbands of frequency domain audio data.