An arbitrary rate digital decimator filter (204) and associated method are disclosed for filtering a digital data stream with a plurality of cascaded power-of-two decimator stages (205, 207) connected to receive the digital data stream and to generate a first filtered digital signal which is provided to a fractional resampling stage (211) which generates a second filtered digital signal with delta-sigma modulator (310) and a limited integrator stage (320) connected to receive a first control (301) word and a feedback clock signal (305) with inserted or swallowed pulses which is generated by a clock generator in response to pulse commands generated by the limited integrator stage, wherein the limited integrator is configured to generate time shift commands (303) to a timing shift filter (340) which performs fractional interpolation on the first filtered digital signal to generate the second filtered digital signal.

A signal conversion from an input signal to an output signal where the filter used is factorized so that the conversion comprises determining 1) only a first factor at each sampling time of the input signal, where this first factor is independent on the sampling times of the output signal, and 2) only a second factor at each sampling time of the output signal, where this second factor is independent of the sampling times of the input signal. This reduces the computational load for this conversion. In addition, for most filters, the factors may be calculated recursively further increasing the computational load and also reducing the storage requirements. This allows for instantaneous changes in the sampling rates or non-uniform sampling rates with low computational requirements and low memory usage.

An instrument configured to process signal data is disclosed. The instrument is operable to control and or change the sampling rate of the signal data from a first sample rate to a second sample rate different than the first sample rate.

Systems and methods are provided in which a wireless receiver can be configured to digitally synchronize a receive sampling rate to a transmit sampling rate, and may include a digital interpolator controlled by a timing control unit with a timing offset estimator. The timing control unit can be configured to calculate and output parameters to the digital interpolator. The digital interpolator can include a sample buffer followed by a fractional delay filter. Output parameters to the digital interpolator can include a fractional delay timing offset signal of the receiver relative to a transmitter timing signal and a buffer pointer control signal to control a position of the read pointer relative to a write pointer to compensate for subsample timing offset. The timing offset estimator can be configured to calculate and provide to the timing control unit a sampling period ratio control word and an instantaneous timing offset control word.

Disclosed herein, among other things, are methods and apparatus for providing a time-stamp based controller for synchronization of sink or source sampling rate with external packet rate. A method for wireless communications includes receiving a transmission of a packet using a wireless transceiver of an electronic device, and using a processor of the electronic device to read a first value of a system timer and store the first value as an arrival time-stamp. The packet is decoded and processed by the processor, and sent to an output. When the processed packet is sent, a second value of the system timer is read, adjusted and stored as a departure time-stamp. The arrival time-stamp and the departure time-stamp are used to calculate an adjustment stimulus for a sample rate actuator of the electronic device. The sample rate actuator is configured to maintain synchronization of sampling rate with an external packet rate.

A position coordinate difference computing unit (5a to 5c) calculates position coordinate differences between position coordinates of the output digital signals and position coordinates of the input digital signals adjacent to the position coordinates. An FIR coefficient memory (13a to 13c) stores FIR coefficients of an FIR-LPF and outputs FIR coefficients corresponding to position coordinate differences between a fixed number of the output digital signals adjacent to the position coordinates of the output digital signals and the output digital signals. A control unit (11) supplies a group of the FIR coefficients and a group of the input digital signals corresponding to the respective position coordinate differences to the parallel FIR calculator (4) in predetermined order when the position coordinate differences corresponding to two or more different output digital signals are concurrently computed. The parallel FIR calculator (4) performs an FIR-LPF interpolating calculation by using those to obtain the output digital signals.

Disclosed herein, among other things, are methods and apparatus for providing a time-stamp based controller for synchronization of sink or source sampling rate with external packet rate. A method for wireless communications includes receiving a transmission of a packet using a wireless transceiver of an electronic device, and using a processor of the electronic device to read a first value of a system timer and store the first value as an arrival time-stamp. The packet is decoded and processed by the processor, and sent to an output. When the processed packet is sent, a second value of the system timer is read, adjusted and stored as a departure time-stamp. The arrival time-stamp and the departure time-stamp are used to calculate an adjustment stimulus for a sample rate actuator of the electronic device. The sample rate actuator is configured to maintain synchronization of sampling rate with an external packet rate.

Sample rate converter and related methods are provided. A method may include (1) obtaining a pitch value based at least on a relationship between an input sampling rate of input samples of a first audio signal to an output sampling rate of output samples corresponding to a second audio signal; (2) automatically generating a first set of interpolated coefficient values by interpolating between a first set of coefficient values corresponding to a first filter and automatically generating a second set of interpolated coefficient values by interpolating between a second set of coefficient values corresponding to a second filter; (3) automatically generating a third set of coefficient values by interpolating between the first set of interpolated coefficient values and the second set of interpolated coefficient values using a set of fraction values related to the pitch value; and (4) filtering data corresponding to the input samples.

The subject disclosure is directed towards a technology that may be used in an audio processing environment. Nodes of an audio flow graph are associated with virtual mix buffers. As the flow graph is processed, commands and virtual mix buffer data are provided to audio fixed-function processing blocks. Each virtual mix buffer is mapped to a physical mix buffer, and the associated command is executed with respect to the physical mix buffer. One physical mix buffer mix buffer may be used as an input data buffer for the audio fixed-function processing block, and another physical mix buffer as an output data buffer, for example.

Systems and methods are provided in which a wireless receiver can be configured to digitally synchronize a receive sampling rate to a transmit sampling rate, and may include a digital interpolator controlled by a timing control unit with a timing offset estimator. The timing control unit can be configured to calculate and output parameters to the digital interpolator. The digital interpolator can include a sample buffer followed by a fractional delay filter. Output parameters to the digital interpolator can include a fractional delay timing offset signal of the receiver relative to a transmitter timing signal and a buffer pointer control signal to control a position of the read pointer relative to a write pointer to compensate for subsample timing offset. The timing offset estimator can be configured to calculate and provide to the timing control unit a sampling period ratio control word and an instantaneous timing offset control word.