Disclosed herein are switching or other active FET configurations that implement a main-auxiliary branch design. Such designs include a circuit assembly for performing a switching function that includes a branch including a main path in parallel with an auxiliary path, both the main path and the auxiliary path having a plurality of field-effect transistors. The circuit assembly also includes a first gate bias network connected to the main path. The circuit assembly also includes a second gate bias network connected to a first subset of the plurality of FETs of the auxiliary path. The circuit assembly also includes a third gate bias network connected to a second subset of the plurality of FETs of the auxiliary path, the second gate bias network and the third gate bias network being independently configurable to improve linearity of the switching function.

A low-voltage protective switching device includes: at least one line conductor length extending from a line conductor supply connection of the low-voltage protective switching device to a line conductor load connection of the low-voltage protective switching device; a neutral conductor length extending from a neutral conductor connection of the low-voltage protective switching device to a neutral conductor load connection of the low-voltage protective switching device; a mechanical bypass switch and a first mechanical circuit breaker disposed in series in the line conductor length; a second mechanical circuit breaker disposed in the neutral conductor length; a first semiconductor switching arrangement disposed in parallel to the bypass switch; and an electronic control unit that presettably actuates the bypass switch, the first mechanical circuit breaker, the second mechanical circuit breaker, and the first semiconductor switching arrangement. The first semiconductor switching arrangement includes a snubber, which includes a first capacitor.

A switch includes an input terminal and an output terminal. The switch also includes a first stack having transistors coupled in series, and a second stack having transistors coupled in series. The first stack and the second stack are connected in parallel with one another.

In a method for actuating reverse-conducting semiconductor switches, a plurality of reverse-conducting semiconductor switches is arranged in a parallel circuit. Gate contacts of switching elements of at least two of the plurality of reverse-conducting semiconductor switches are controlled by actuating the at least two of the reverse-conducting semiconductor switches at least intermittently with different voltages, thereby allowing to influence a behavior of the switching elements of the at least two of the reverse-conducting semiconductor switches in IGBT (Insulated-Gate-Bipolar-Transistor) and a behavior in diode mode.

In accordance with an embodiment, switch driver includes a first switch driver configured to be coupled to a control node of a first switch, a second driver configured to be coupled to a control node of a second switch, and a first terminal and a second terminal configured to be couple to a boot capacitor. The first terminal is coupled between a boot input of the first switch driver and the second terminal is configured to be coupled to outputs of the first switch and the second switch. The switch driver further includes a voltage measurement circuit coupled to the first terminal and the second terminal, and a control circuit configured to activate the second switch driver when the voltage measurement circuit indicates that a voltage across boot capacitor is below a first threshold.

Power switch cells (20) respectively includes power switches (21), each of which is capable of performing switching between electrical connection and disconnection between a global power supply line (11) and a local power supply line (8) in accordance with a control signal (CTR). The power switches (21) are connected in a chain state to constitute a chain connection through which the control signal (CTR) is sequentially transmitted. A starting point switch (21a) in the chain connection has a greater distance to an edge (BE) of a region occupied by a power domain than an ending point switch (21b).

A field effect transistor semiconductor device having a compact device footprint for use in automotive and hot swap applications. The device includes a plurality of field effect transistor cells with the plurality of transistor cells having at least one low threshold voltage transistor cell and at least one high threshold voltage transistor cell arranged on a substrate. The field effect transistor semiconductor device is configured and arranged to operate the at least one high threshold voltage transistor cell during linear mode operation, and operate both the low threshold voltage transistor cell and the high threshold voltage transistor cell during resistive mode operation. Further provided is a method of operating field effect transistor semiconductor device including a plurality of field effect transistor cells that includes at least one low threshold voltage transistor cell and at least one high threshold voltage transistor cell.

A communication node is connected to a transmission line which transmits a differential signal changeable between a high level and a low level and has a high potential signal line and a low potential signal line as a pair of signal lines. The communication node includes: an inter-line potential detector that detects an intermediate potential between the pair of signal lines; a node potential detector that detects an intermediate potential of an operation power source voltage which is supplied to the communication node; and a voltage adjuster that detects a difference between the intermediate potential detected by the inter-line potential detector and the intermediate potential detected by the node potential detector, and adjusts the operation power source voltage in accordance with the difference.

A PCH driving section of a gate driving circuit applies a high level driving voltage that can be changed by a high side pre-driver to a gate of a P-channel MOSFET connected between a high potential side terminal and a high side driving terminal. An NCH driving section applies a low level driving voltage to a gate of an N-channel MOSFET connected between a low side driving terminal and a low potential side terminal using a low side pre-driver. The low potential side terminal is provided separately from a ground terminal.

A switching circuit includes: a main switch array including multiple main switch elements respectively arranged on multiple main signal paths configured in a parallel connection, wherein the multiple main signal paths are coupled with a first circuit node; a main switch control circuit for controlling the multiple main switch elements; an auxiliary switch array including multiple auxiliary switch elements respectively arranged on multiple auxiliary signal paths configured in a parallel connection, wherein the multiple auxiliary signal paths are also coupled with the first circuit node; and an auxiliary switch control circuit for controlling the multiple auxiliary switch elements so as to maintain a total number of turned-on switch elements in the main switch array and the auxiliary switch array to be equal to or more than a threshold quantity.