Embodiments of methods and systems for gain control in a communications device are described. In an embodiment, a method for gain control in a communications device involves detecting a change in an amplification gain that is applied to an analog signal in the communications device and compensating for the change in the amplification gain by manipulating an amplitude of a digital signal that is converted from the analog signal. Other embodiments are also described.

A data acquisition system comprises a signal processing chain including an analog-to-digital converter (ADC) circuit configured to: produce a digital output from an input signal; detect a specified signal feature of the input signal; and change an operating condition of an additional circuit of the signal processing chain in response to detecting the signal feature of the input signal.

A direct-digital receiver architecture is configured to make maximal use of the dynamic range of its analog to digital converter (ADC). The receiver includes an analog frontend that applies a variable gain factor to the analog input signal, a gain level unit that determines the variable gain factor by monitoring the digital signal that is output by the ADC, a gain scaling unit that determines a digital scale factor according to the determined gain factor, and a gain factor multiplier that multiplies the digital signal by the scale factor to produce a scaled digital signal, said multiplying being time aligned with the variable gain factor. The receiver further includes a digital signal processing train that is cognisant of the dynamic range of the ADC, variable gain factor and the digital scale factor for the time domain sample being processed.

Various methods and systems are related to pulse-based automatic gain control. In one example, pulse-based automatic gain control (AGC) includes a variable gain amplifier (VGA) configured to amplify an analog input signal to generate an analog output signal based upon an amplification control signal; an integrate-and-fire (IF) sampler configured to generate a pulse train corresponding to the analog output signal; and a gain adjustment configured to generate the amplification control signal based upon a comparison of time between pulses of the pulse train to a reference time. In another example, a method includes determining time between pulses of a pulse train corresponding to an analog output signal from a VGA; generating an amplification control signal based upon a comparison of the time between pulses of the pulse train to a reference time; and adjusting amplification of the VGA in response to the amplification control signal.

A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

A direct-digital receiver architecture incorporating an analog to digital converter including: input signal reception unit for receiving an analog input signal; an analog frontend applying a variable gain factor to the analog input signal so as to produce a gain adjusted input signal; an analog to digital converter converting the gain adjusted input signal to a corresponding digital signal; a gain level unit for determining the variable gain factor via monitoring of the corresponding digital signal; a gain scaling unit for determining a scale factor depending on the gain level; a gain factor multiplier for multiplying the corresponding digital signal by a scale factor to produce a scaled digital signal; time alignment of analog front-end variable gain factor into to the digital signal processing train; a digital signal processing train cognisant of the dynamic range of the ADC, dynamic range of the analog-front and gain factor and the gain factor for the time domain sample being processed.

A voltage detection circuit including an input voltage stage configured to scale down an input voltage to produce a scaled down voltage, a gain loss stage configured to receive and adjust the scaled down voltage based on a determined gain or loss to be applied to the scaled down voltage, and a comparison circuit configured to determine if the input voltage is over or under a desired voltage value.

A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

A voltage detection circuit including an input voltage stage configured to scale down an input voltage to produce a scaled down voltage, a gain loss stage configured to receive and adjust the scaled down voltage based on a determined gain or loss to be applied to the scaled down voltage, and a comparison circuit configured to determine if the input voltage is over or under a desired voltage value.

Embodiments of methods and systems for gain control in a communications device are described. In an embodiment, a method for gain control in a communications device involves detecting a change in an amplification gain that is applied to an analog signal in the communications device and compensating for the change in the amplification gain by manipulating an amplitude of a digital signal that is converted from the analog signal. Other embodiments are also described.