There is provided a time synchronization method, including: an adjustment stage including N adjustment cycles, N being an integer greater than 1; in each adjustment cycle, generating a physical clock signal at least according to a pre-acquired frequency control word corresponding to the adjustment cycle, and obtaining logical time at least according to the physical clock signal and a physical time deviation; a clock slope of the physical clock signal generated in each adjustment cycle reaches its corresponding target value, and the target values of the clock slopes of the physical clock signals in the N adjustment cycles gradually approach 1; the physical time deviation is: a time difference between the reference time and the physical time corresponding to the physical clock signal in an Nth adjustment cycle at the end of the Nth adjustment cycle. A time synchronization device and a network node device are provided.

A method of synchronization of a communication device comprising a first and second communication ports, each of the first and second communication port being associated with a respective first and second time system, the method comprising a regular master synchronization process synchronizing regularly the first time system with an external synchronization server according to a time synchronization protocol; a regular slave synchronization process synchronizing regularly the second time system with the first-time system; detecting a loss of synchronization between the first and second time system; determining which of the first and second time system is desynchronized; and synchronizing the desynchronized time system with the other one.

In one embodiment, a technique for implementing precision time protocol (PTP) over a packet transport (e.g., IPv4, IPv6, etc.) with clock redundancy is provided. The technique may involve maintaining clock synchronization by a PTP node, where the PTP node participates in an exchange of one or more messages with a current master node and at least one connected node that is a slave to the PTP node. The technique may also involve detecting one or more conditions that prompt a switch to a new master PTP node. The technique may further involve selecting the new master PTP node, and determining, based on the selection, whether the new master PTP node is a slave to the PTP node. The technique may yet further involve taking action, based on the determination, to indicate to the new master PTP node that the PTP node is not a suitable master.

A method for detecting a timing reference affected by a change in path delay asymmetry in a communications network comprising a master node having a master clock and a plurality of slave nodes each having a respective slave clock is provided. The method comprises: determining that a first timing reference received by a first slave node indicates a time correction to its slave clock greater than a time correction threshold; determining whether one or more other slave nodes have received a timing reference indicating a time correction to their slave clock greater than a time correction threshold; and determining whether the first timing reference is affected by a change in path delay asymmetry based on the determining of whether one or more other slave nodes have received a timing reference indicating a time correction to their slave clock greater than a time correction threshold. Apparatus and a computer program for detecting a timing reference affected by a change in path delay asymmetry in a communications network are also provided.

A first synchronization signal for synchronization with a synchronization signal source is acquired from a first signal source. A first signal synchronized with the synchronization signal source is generated based on the first synchronization signal. A second synchronization signal for synchronization with the synchronization signal source is acquired from a second signal source different from the first signal source. A second signal synchronized with the synchronization signal source is generated based on the second synchronization signal. A timing signal synchronized with the synchronization signal source is generated based on the first signal of a synchronization device. A phase difference between the timing signal and the second signal is output. An offset is set so that there is no phase difference between the timing signal and the second signal based on the phase difference.

In various embodiments, a method is provided. In this method, a first signal is received from a master node, and is sampled to obtain a first sample. The first sample is then quantized to obtain a quantized form of the first sample. A first synchronization sequence is detected from the quantized form of the first sample at T2. First information is received from the master node and the first information is used to indicate a moment T1 at which the master node sends the first synchronization sequence. A second synchronization sequence is sent to the master node at T3. Second information received from the master node and the second information is used to indicate a moment T4 at which the master node detects a quantized form of the second synchronization sequence. Time synchronization is performed based on T1, T2, T3, and T4.

A time synchronization system includes a clock supply apparatus that includes an oscillator and generates a first time signal; and a time synchronization apparatus that includes a receiver which includes a fluctuation reducing unit provided on an outside of the clock supply apparatus, and which generates a second time signal based on a satellite signal. In addition, it is preferable that the time synchronization system is used in the network synchronization based on a master-slave synchronization method. Further, it is preferable that the oscillator is an atomic oscillator. In addition, it is preferable that the receiver and the clock supply apparatus are disposed at positions which are separated from each other. Further, it is preferable that the receiver and the clock supply apparatus are connected to each other via an optical fiber.

A synchronization timing loop detection method includes monitoring an active timing reference for a flapping event at a network element, incrementing a counter for each detected flapping event, determining if the counter exceeds a threshold over a predetermined time period, and, if the counter exceeds the threshold, declaring a possible timing loop on the active timing reference. The flapping event can include the active timing reference being active followed by inactive due to synchronization status messaging and one of a logical and physical timing loop on the active timing reference. A synchronization timing loop detection system and a network element for synchronization timing loop detection for the synchronization timing loop detection method are also disclosed.

A method of simplifying the implementation of Synchronous Ethernet on an Ethernet device having a first port and a second port device using a predetermined protocol and signaling, comprises delivering a master clock from a Synchronous Ethernet system to the first port of the Ethernet device; transmitting the delivered master clock to the second port of the Ethernet device independently of the protocol and signaling of the Ethernet device; and transmitting the master clock from the second port of the Ethernet device to a downstream device that supports Synchronous Ethernet. In one implementation, the Ethernet device has a local clock, and the method synchronizes the local clock to the master clock. In another implementation, the Ethernet device does not have a local clock, and the master clock is transmitted from the second port of the Ethernet device to the downstream device without any synchronizing operation at the Ethernet device.

A clock synchronization packet exchanging method includes sending, by a first device in a Flexible Ethernet (FlexE) group, a first FlexE instance at a first physical layer (PHY), where the first FlexE instance includes a clock synchronization packet, and a second FlexE instance sent by the first device in the FlexE group at a second PHY also includes a clock synchronization packet. The clock synchronization packets are carried in a plurality of FlexE instances transmitted between a transmit end and a receive end in the FlexE group.