An example method comprises receiving, by a first PHY of a first transceiver, a timing packet, timestamping, by the first transceiver, the timing packet and providing the timing packet to a first intermediate node, determining a first offset between the first intermediate node and the first transceiver, updating a first field within the timing packet with the first offset between the first intermediate node and the first transceiver, the offset being in the direction of the second transceiver, receiving the timing packet by a second transceiver, the timing packet including the first field, information within the first field being at least based on the first offset, determining a second offset between the second transceiver and an intermediate node that provided the timing packet to the second transceiver and correcting a time of the second transceiver based on the information within the first field and the second offset.

In a system of control devices networked with one another via a first network or multiple first sub-networks, and of which at least one is a server-based control device that combines multiple functional units, a grandmaster clock is defined by ascertaining the best clock of the entire network. If the best clock is located in a server-based control device, the distances are ascertained between selected functional units that are suitable as a source of the grandmaster clock and selected active network interfaces that connect the server-based control device to the first network or multiple first sub-networks, and the average distance to all selected network interfaces for each of the selected functional units is determined. That selected functional unit that has the smallest average distance to all selected network interfaces is defined as grandmaster clock for the first network or the first sub-networks.

A media access control (MAC) processor of a network device receives a timing packet to be transmitted by the network device. The MAC processor generates one or more indicators to be used by a PHY device of the network device for embedding timing information into the timing packet. The one or more indicators include at least an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded, an indicator of a location of a field in the timing packet at which the timing information is to be embedded, and an indicator of whether timing information in the timing packet needs to be updated. The MAC processor transfers the timing packet and the one or more indicators to the PHY device for further processing of the timing packet and subsequent transmission of the timing packet from the network device.

A method for power-smart packet processing includes, in response to an event trigger signal, generating, by a state machine, a number of enable signals. The method further includes applying the enable signals to a number of single-level inferred clock (SLICK) gates to generate multiple clock signals with cycles of latency. The clock signals are applied to at least some of a number of groups of flops used for packet processing. The enable signals are clock-gated enable signals that start at consecutive cycles of a main clock, and stay active for at least one cycle of the main clock. The method further includes using flow-aware clock-gating technology (FACT) to distinctly identify logic and tables and continually variable traffic (CVT) to control packet rate and packet spacing.

Time of day (ToD) registers provide respective virtual ToDs corresponding to the occurrence of edges of input clock signals being supplied to an integrated circuit. The integrated circuit generates a heartbeat clock signal having a frequency higher than a SYNC signal and time stamps the heartbeat clock signal to generate heartbeat time stamps. The heartbeat time stamps are used along with the time stamps of the input clock signals to determine the time of day corresponding to occurrences of edges of the input clock signals.

Method for synchronizing control applications via a communication network for transferring time-critical data, wherein network infrastructure devices determine, for the forwarding of datagrams associated with selected data streams, respective time delays between a planned transmission time of the datagram and an actual transmission time of the datagram in question, where the selected data streams are assigned to control applications running on communication terminals, and where a beginning of a next end-node-side transfer cycle is determined by a starting-node-side control application based on the time delay determined by a preceding network infrastructure device in question, an accumulated maximum time delay and a transmission time of the datagrams to achieve synchronization between transfer cycles of starting-node-side control applications and transfer cycles of end-node-side control applications.

Various examples of the present disclosure relate to a transmitter apparatus, device, method, and computer program, to a receiver apparatus, device, method, and computer program, and to corresponding source and destination devices and communication devices. The transmitter apparatus comprises a plurality of ports for data to be transmitted to a destination device, with each port being associated with a transmission data rate. The transmitter apparatus comprises processing circuitry configured to obtain data to be transmitted to the destination device via the plurality of ports. The processing circuitry is configured to multiplex the data to be transmitted to the destination device according to a weighted round-robin scheme to generate a multiplexed data stream. The weights of the weighted round-robin scheme are based on the transmission data rate of the respective port the data is obtained over. The processing circuitry is configured to transmit the multiplexed data stream to the destination device.

The precision time protocol (PTP) runs on the peer switches in an MLAG domain. PTP messages received by one peer switch on an MLAG interface is selectively peer-forwarded to the other peer switch on the same MLAG interface in order to coordinate a synchronization session with a PTP node. The peer-forwarded messages inform one peer switch to be an active peer and the other peer switch to be an inactive peer so that timestamped messages during the synchronization session are exchanged only between the PTP node the active peer, and hence take the same data path.

The present disclosure relates to a communication device, a communication method, and a program that make it possible to perform an appropriate output control based on time synchronization for a plurality of sensors. There are provided: a communication processing control section that controls communication processing in accordance with a predetermined standard with a plurality of sensors; and a time synchronization counter to implement a timing control defined in the standard. Then, information processing is performed that is necessary for an output control that causes the time synchronization counter to time synchronize with time synchronization counters included in the respective sensors to output time data indicating a timing at which sampling data is sampled together with the sampling data sampled at a predetermined sampling cycle in the plurality of sensors. The present technology is applicable, for example, to a communication system employed in a movable body including the plurality of sensors.

An optical link channel auto-negotiation method and apparatus, a non-transitory computer-readable storage medium are disclosed. The optical link channel auto-negotiation method may include at least one of the following: configuring a receiving rate, determining whether a receive clock recovered from received data by a physical layer (PHY) module is locked, and in response to determining that the receive clock recovered from the received data by the PHY module is locked, determining that the receiving rate is configured correctly; configuring a first predetermined parameter in response to determining that the receiving rate is configured correctly, determining whether code block data of the PHY module is in a synchronized state, and in response to determining that the code block data of the PHY module is in a synchronized state, determining that the first predetermined parameter is configured correctly.