A digital signal processing (DSP) device includes a first fitter to equalize channel dispersion associated with signal transmission through a medium, a second filter to cancel channel reflections, and a third filter to at least reduce noise. The DSP device is a receiver DSP of the SERDES.

An equalizer circuit includes: a pair of input terminals: a differential amplification circuit outputs, to a pair of output terminals, first signals obtained by amplifying a difference in levels of input signals supplied to the pair of input terminals; and a differential differentiation amplification circuit that outputs, to the pair of output terminals, second signals obtained by amplifying a time-varying change in the difference in the levels of the input signals supplied to the pair of input terminals.

This application is directed to transferring data over a data link coupled between two electronic devices. The data link includes a retimer having a full data path and a bit level data path that are coupled in parallel. The data link is initiated with the full data path and a first sequence of data packets is transferred via the full data path in accordance with a low data rate setting. While transferring the first sequence of data packets, the first sequence of data packets is manipulated in the full data path to establish a connection of the data link, and in response to establishing the connection of the data link, the data link is switched from the full data path to the bit level data path.

A method and system of optical communication are provided. An optical modulator device includes a first and a second waveguide segment, and is configured to modulate an incident optical signal. A first feed-forward equalization (FFE) circuit including an inner first tap and an inner second tap, is configured to equalize the first waveguide segment. A second FFE circuit including a first inner tap and a second inner tap, is configured to equalize the second waveguide segment. An FFE recombination of the first inner tap and the second inner tap of the first and second FFE circuits, is in the electrical domain, respectively. An FFE recombination of the first and second modulation signals, operative to equalize a combination of the first second waveguide segments, is in the optical domain.

In the present invention, a transmitting station apparatus includes a training signal generation unit, a transmission end linear equalization unit configured to output a plurality of second data signals obtained by equalizing IAI of a plurality of first data signals by using a transmission end transfer function for equalizing IAI, and a transmitting station communication unit configured to transmit a training signal or the plurality of second data signals to a receiving station apparatus and receive information on the transmission end transfer function from the receiving station apparatus, and the receiving station apparatus includes a communication path estimation unit configured to estimate a communication path response from the training signal received by the receiving station communication unit, a reception end coefficient calculation unit configured to calculate the transmission end transfer function and a reception end transfer function for equalizing ISI, based on the communication path response, and a reception end linear equalization unit configured to output a plurality of third data signals obtained by equalizing ISI from the plurality of second data signals received by the receiving station communication unit by using the reception end transfer function.

Disclosed are methods, systems, devices, apparatus, media, design structures, and other implementations, including a method is that includes receiving, at a receiver device, a signal transmitted from a remote wireless device, with the signal including a training sequence, and updating, based on the training sequence, one or more adjustable characteristics for a non-linear equalizer of the receiver device, with the one or more adjustable characteristics controlling signal non-linear compensation processing to correct non-linear distortions affecting communication signals transmitted from the remote wireless device. In some embodiments, the method may further include updating, based on the training sequence, additional one or more adjustable characteristics for a linear equalizer of the receiver device, with the additional one or more adjustable characteristics controlling signal linear compensation processing to correct linear distortions affecting the communication signals.

The present disclosure relates to an equalizer training unit for deriving equalization parameters for compensating data-dependent distortion in received samples by use of a training sequence including a sequence p>1 times and cyclically comprising N sub-sequences of respective combinations of L time-domain symbols of a modulation scheme, wherein the N sub-sequences are cyclically arranged in a selected order and such that L−1 symbols of a respective sub-sequence overlap with symbols in the preceding and following sub-sequences. The present disclosure further relates to a training sequence generator unit for generative the training sequence and an equalizer employing the equalizer training unit.

A method for detecting a signal by a signal receiving apparatus is provided. The method includes detecting a part of block diagonal matrices included in a diagonal matrix based on at least one channel impulse response (CIR) for a received signal, detecting remaining block diagonal matrices excluding the part of block diagonal matrices from among block diagonal matrices included in the diagonal matrix, estimating modulation symbols from the received signal based on the diagonal matrix, generating a block diagonal matrix by multiplying one of second matrices included in a first matrix, which is generated by applying a circular extension scheme to a fourth matrix including third matrices, by a fast Fourier transform (FFT) matrix, generating a third matrix for one of the estimated modulation symbols, the third matrix includes vectors for channelization codes, and generating a vector based on the channelization codes or the at least one CIR.

A calibration method of an equalizer circuit for a memory storage device is disclosed. The calibration method includes: receiving a first signal; adjusting, by the equalizer circuit, the first signal according to a control parameter to output a second signal; generating a first sampling signal according to a first reference signal and the second signal, wherein the first sampling signal reflects data transmitted by the first signal; and generating a second sampling signal according to a second reference signal and the second signal and adjusting the control parameter according to the second sampling signal to calibrate the equalizer circuit, wherein a voltage value of the first reference signal is different from a voltage value of the second reference signal.

Systems and methods for electronic devices including two or more semiconductor devices coupled via an interconnect. The interconnect includes multiple lanes each having a link between the first and second semiconductor devices. One or more lanes of the multiple lanes each include clock and data recovery circuitry to perform full clock and data recovery. One or more other lanes of the multiple lanes each do not include clock and data recovery circuitry and instead includes a phase adjustment and clock multiplier circuit that is slave to clock and data recovery circuitry of the one or more lanes.