An electronic device includes a clock recovery circuit, a converter circuit, and a decoder circuit. The clock recovery circuit generates a reference clock. The converter circuit generates a conversion value that corresponds to a difference between a phase of reception data and a phase of the reference clock. The decoder circuit analyzes a reception characteristic of an antenna based on conversion values that corresponds to a start-of-frame (SOF) marker. The decoder circuit decodes a conversion value that corresponds to encoded data following the SOF marker in the reception data, with reference to the analyzed reception characteristic, into a digital value.

A method and apparatus in a communication system. The method includes: detecting multiple signal peaks of a target exceeding a predetermined threshold magnitude set to constitute one or more peak clusters; generating one or more noise shaping pulse clusters; assigning one or more noise shaping pulse clusters to the detected signal peaks in one or more peak clusters to clip the detected signal peaks in frequency domain; calculating an output signal based on the clipped signal peaks; the noise shaping pulse cluster comprises multiple sub-noise shaping pulses, bandwidths of the multiple sub-noise-shaping pulses are overlapped and a bandwidth of the noise shaping pulse cluster is greater than the bandwidth of the target signal.

Disclosed herein are a method and apparatus for iterative interference cancellation and channel estimation in a system based on FTN communication including a pilot. Interference of a pilot symbol on a data symbol is estimated, and the estimated interference is eliminated from a sequence of data symbols. When demodulation and channel decoding are performed on the sequence of data symbols, interference between data symbols and interference of a data symbol on a pilot symbol are estimated. Such estimation is repeatedly performed, and as FTN interference is repeatedly estimated and eliminated, channel estimation performance is improved, and through the improved channel estimation performance, the reception performance of the entire system is improved.

Disclosed is a mechanism for limiting Intersymbol Interference (ISI) when measuring uncorrelated jitter in a test and measurement system. A waveform is obtained that describes a signal. Such waveform may be obtained from memory. A processor then extracts a signal pulse from the waveform. The processor selects a window function based on a shape of the signal pulse. Further, the processor applies the window function to the signal pulse to remove ISI outside a window of the window function while measuring waveform jitter. The window function may be applied by applying the window function to the signal pulse to obtain a target pulse. A linear equalizer is then generated that results in the target pulse when convolved with the signal pulse. The linear equalizer is then applied to the waveform to limit ISI for jitter measurement.

Embodiments of the present disclosure provide mechanisms that enable designing an FIR filter that would have a guaranteed globally optimal magnitude response in terms of the minimax optimality criterion given a desired weight on the error in the stopband versus the passband. Design of such a filter is based on a theorem (characterization theorem) that provides an approach for characterizing the global minimax optimality of a given FIR filter h[n], n=0, 1, . . . , N, where optimality is evaluated with respect to a magnitude response of this filter, |H(e.sup.j?)|, as compared to the desired filter response, D(?), which is unity in the passband and zero in the stopband. The characterization theorem enables characterizing optimality for both real-valued and complex-valued filter coefficients, and does not require any symmetry in the coefficients, thus being applicable to all non-linear phase FIR filters.

Disclosed herein are a method and apparatus for iterative interference cancellation and channel estimation in a system based on FTN communication including a pilot. Interference of a pilot symbol on a data symbol is estimated, and the estimated interference is eliminated from a sequence of data symbols. When demodulation and channel decoding are performed on the sequence of data symbols, interference between data symbols and interference of a data symbol on a pilot symbol are estimated. Such estimation is repeatedly performed, and as FTN interference is repeatedly estimated and eliminated, channel estimation performance is improved, and through the improved channel estimation performance, the reception performance of the entire system is improved.

Disclosed embodiments relate to a system that changes transmitter and/or receiver settings to deal with reliability issues caused by a predetermined event, such as a change in a power state or a clock start event. One embodiment uses a first setting while operating a transmitter during a normal operating mode, and a second setting while operating the transmitter during a transient period following the predetermined event. A second embodiment uses similar first and second settings in a receiver, or in both a transmitter and a receiver employed on one side of a bidirectional link. The first and second settings can be associated with different swing voltages, edge rates, equalizations and/or impedances.

Systems and methods are directed to phase modulation of polar coordinates in a transmitter of wireless signals, to achieve high transmit power levels while meeting spectral mask and EVM requirements. An input signal is mapped to a sequence of modulation frequency (e.g., O-QPSK to MSK) to generate a mapped signal. A digital frequency shaping filter is applied to the mapped signal to generate a shaped signal. An adaptive rounding algorithm is applied to the shaped signal to generate a reduced bit-width signal. A digital frequency synthesizer is applied to the reduced bit-width signal to generate an analog waveform for transmission.

Disclosed embodiments relate to a system that changes transmitter and/or receiver settings to deal with reliability issues caused by a predetermined event, such as a change in a power state or a clock start event. One embodiment uses a first setting while operating a transmitter during a normal operating mode, and a second setting while operating the transmitter during a transient period following the predetermined event. A second embodiment uses similar first and second settings in a receiver, or in both a transmitter and a receiver employed on one side of a bidirectional link. The first and second settings can be associated with different swing voltages, edge rates, equalizations and/or impedances.

An electronic device includes a clock recovery circuit, a converter circuit, and a decoder circuit. The clock recovery circuit generates a reference clock. The converter circuit generates a conversion value that corresponds to a difference between a phase of reception data and a phase of the reference clock. The decoder circuit analyzes a reception characteristic of an antenna based on conversion values that corresponds to a start-of-frame (SOF) marker. The decoder circuit decodes a conversion value that corresponds to encoded data following the SOF marker in the reception data, with reference to the analyzed reception characteristic, into a digital value.