H04L25/4908

Retimer training during link speed negotiation and link training

Disclosed retimer modules and methods enable equalizer training during link speed negotiation. One illustrative retimer module includes: an analog to digital converter that uses a sampling clock to digitize a receive signal; an equalizer that converts the digitized receive signal into an equalized signal; a decision element that derives a receive symbol stream from the equalized signal; and a clock recovery module that derives the sampling clock based at least in part on an equalization error of the equalized signal, the sampling clock having a frequency with a range including a baud rate of the receive signal at a first supported speed and including a frequency not less than twice the baud rate of the receive signal at a second supported speed.

DEVICES AND METHODS FOR ENCODING AND DECODING TO IMPLEMENT A MAXIMUM TRANSITION AVOIDANCE CODING WITH MINIMUM OVERHEAD

Provided is a device and method for encoding and decoding to implement maximum transition avoidance coding with minimum overhead. An exemplary device performs encoding and/or decoding, by using sub-block lookup tables representing correlations between some bit values in a data burst and symbols, a combining lookup table selectively interconnecting the sub-block lookup tables based on remaining bit values of the data burst, and a codeword decoding lookup table designating the sub-block lookup tables corresponding to the symbols of each of received codewords.

Interface for Bridging Out-of-Band Information from a Downstream Communication Link to an Upstream Communication Link
20220114124 · 2022-04-14 ·

A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.

Surgical helmet

Implementations described herein include surgical helmet assemblies that have a helmet enclosure shaped to encircle a head of a user. The helmet enclosure retains a fan and includes a brow bar portion at a front of the helmet enclosure that is shaped to extend along a brow or a forehead of the user and having a light positioned therein. The helmet enclosure also includes a stabilizer extending downward from the helmet enclosure in front of the ears of a user, a face shield that is transparent and coupleable to at least the brow bar portion, a headband shaped to extend across an occiput region of the user's head, and a surgical garment for covering at least the head and shoulders of a user in use. The brow bar portion includes vents disposed therein to direct airflow pushed through the helmet enclosure from the fan onto the user. The face shield is coupleable to the helmet enclosure by one or more of a hook and loop fastener on the helmet enclosure or the stabilizer and a post protruding from the brow bar portion.

High-speed serial interface for orthogonal frequency division multiplexing (OFDM) cable modems
11296920 · 2022-04-05 · ·

A high-speed serial interface (HSIF) for communicating between an analog front end (AFE) and a System on a Chip (SoC) digital radio via a bi-directional serial bit connection for an OFDM cable modem includes generating Status Frames and Data Frames to be communicated between the tuner and AFE and sending the generated Status Frames and Data Frames on a continual basis. Each Frame is a 10-bit K.28 Comma Sync word followed by a payload and when no data is queued to be communicated, Status Frames are sent asynchronously as filler frames.

CLIENT SIGNAL TRANSMISSION METHOD, DEVICE AND SYSTEM AND COMPUTER-READABLE STORAGE MEDIUM
20220103282 · 2022-03-31 · ·

Provided are a client signal transmission method, apparatus and system and a computer-readable storage medium. The method includes mapping a client signal into a predetermined container corresponding to the client signal; mapping the predetermined container into the corresponding number of first code blocks in a payload area of an optical transport network frame and inserting special idle code blocks during the mapping for rate compensation, where the first code blocks are obtained by dividing the payload area of the optical transport network frame; and sending the optical transport network frame carrying the predetermined container and configuration information of the predetermined container.

SIGNAL TRANSMISSION SYSTEM, TRANSMITTER ENCODING APPARATUS AND RECEIVER DECODING APPARATUS
20220094575 · 2022-03-24 ·

A transmitter encoding apparatus includes a multiplexer and a first transmitter encoder. The multiplexer receives a first digital signal and a second signal and to generate an output, in which the output of the multiplexer includes M-bit code words of the first digital signal and M-bit code words of the second digital signal arranged in an interleaved manner. The first transmitter encoder receives the output of the multiplexer and generates N-bit code words, and N is not equal to M. The first transmitter encoder determines a current N-bit code word of the N-bit code words according to the output of the multiplexer and a disparity of a previous N-bit code word of the N-bit code words. The first transmitter encoder transmits the N-bit code words to a receiver decoding apparatus including a demultiplexer and a first receiver decoder configured to decode the N-bit code words.

SYSTEMS AND METHODS FOR CLOCK SYNCHRONIZATION USING SPECIAL PHYSICAL LAYER CLOCK SYNC SYMBOLS
20220045777 · 2022-02-10 ·

Systems and methods for clock synchronization are disclosed in which a primary node generates special physical layer clock sync symbols from the output of a reference clock and inserts the clock sync symbols within a symbol stream to one or more secondary nodes. Upon receiving a symbol stream, a secondary node can extract the clock sync symbols from the stream to synchronize its local clock with the reference clock of the primary node. In particular, the clock sync symbols can be inserted into the symbol stream at any arbitrary symbol location, e.g., even between consecutive symbols of a symbol encoded data frame. The clock sync symbols can also replace some control symbols in the symbol stream, such as idle or comma symbols. Accordingly, the clock sync symbols can be inserted into a symbol stream at fixed intervals, irregular intervals, or at any arbitrary time for high resolution clock synchronization.

DC-balanced, transition-controlled, scalable encoding method and apparatus for multi-level signaling

The present invention relates to an encoding apparatus for multi-level signaling, the encoding apparatus including: a candidate pattern generator (1) generating a set of candidate patterns from input data by using symbol-based inversion; a controller (2) generating a cumulated disparity value that is a result of calculating disparity indicating a degree to which transmission data up to previous transmission deviates from DC balance, storing the cumulated disparity value, and determining a transmission control code by using the cumulated disparity value and a set of disparity values that is a result of calculating disparity indicating a degree to which each of the candidate patterns deviates from DC balance; and a data selector (3) selecting one candidate pattern from the set of the candidate patterns as data to be transmitted, according to the determined transmission control code.

Reduced power transmitter during standby mode

A transmitter includes a data stream encoder layer having an output and a pattern generator having a bit pattern output. The transmitter further includes a first multiplexer having first and second inputs and a first multiplexer output. The first input is coupled to the output of the data stream encoder layer, and the second input is coupled to the bit pattern output of the pattern generator. While at least a portion of the data stream encoder layer is powered down, the pattern generator is configured to provide bit patterns on its bit pattern output, a control signal to the first multiplexer is configured to select the second input of the first multiplexer, and the first multiplexer is configured to output the bit patterns on the output of the first multiplexer.