A data demodulation method, apparatus, and system are presented. The method includes obtaining notification information indicating that UE is in a high-speed moving state; performing time-frequency synchronization processing on first downlink data according to the notification information to obtain second downlink data; and performing demodulation processing on the second downlink data to obtain third downlink data, where in the demodulation processing, inter-TTIs filtering for a channel estimation is not performed, or a filtering coefficient as a weight of a current TTI for a channel estimation is greater than a filtering coefficient as a weight of a TTI that is at the time when the UE is in the non-high-speed moving state for a channel estimation. The demodulation method is applicable to a high-speed scenario for improving a downlink data throughput of the UE.

Systems and methods pertain to a receiver configured to receive and detect convolutionally coded Gaussian frequency-shift keying (GFSK) signals comprising a trellis of branches. The receiver implements a Per-Survivor Processing (PSP) algorithm to generate frequency estimate, phase estimate, and branch metric increment for each branch of a trellis. A Viterbi Algorithm is applied to the trellis for Maximum Likelihood Sequence Estimation (MLSE) of information bits. The receiver includes a PSP block comprising a number of blocks equal to the number of branches of the trellis. Each block includes a Phase Corrector, Decision Feedback Demodulator (DFD), and a Frequency Tracking Loop (FTL) to update the PSP variables.

A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

A device and method for estimating a frequency offset of a received signal is provided. The device comprises: a plurality of phase estimation units, each of the plurality of phase estimation units adapted for receiving one of a plurality of data parts of the received signal and estimating a phase caused by the frequency offset from the received data part, wherein the plurality of data parts comprises payload data and known symbols in the received signal. A method for estimating the frequency offset is also provided; and a frequency offset estimation unit for estimating the frequency offset from a plurality of phases estimated by the plurality of phase estimation units.