Patent classifications
H04L27/3881
DYNAMIC CONSTELLATION ADAPTATION FOR SLICER
System and method of demodulation by adapting constellation values based on statistic distributions of received data symbols. To determine an adapted constellation, an expected ratio of received symbols with values in a certain range is preset based on an expected statistic distribution of data symbols across the multiple constellations. For a set of received symbols, a count ratio of symbols falling in a first range to all the symbols in the set is compared with the expected ratio, where the first range is defined as below a first value. The first value is repeatedly adjusted to adjust the first range until the count ratio equals the expected ratio. The final fist value is then designated as the optimal adapted constellation.
CIRCUITS FOR AMPLITUDE DEMODULATION AND RELATED METHODS
A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately /2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.
Phasor IQ demodulation
A method for demodulating an RF signal to polar in-phase and quadrature (IQ) components that includes converting an RF signal with an analog-to-digital converter and calculating the polar in-phase and quadrature (IQ) components of the RF signal as an IQ phasor phase angle and an IQ amplitude using a digital processor. The analog-to-digital converter uses a sampling rate, where, when the sampling rate used has sampling rates other than 3 times an RF carrier frequency of the RF signal, a digital logic circuit splines data to the sampling rate of 3 times the RF carrier frequency of the RF signal. The digital processor calculates the polar in-phase and quadrature (IQ) components of the RF signal as an IQ phasor phase angle and an IQ amplitude using addition, subtraction, multiplication, division, and absolute value.
Module for a radio receiver
The disclosure relates to a module for a radio receiver. The module comprises an input terminal; an output terminal; a main signal path for communicating in-phase and quadrature signals between the input terminal and the output terminal; and a second signal path. The second signal path is connected in parallel with the main signal path and is configured to: extract in-phase and quadrature signals from the main signal path; filter the extracted in-phase and quadrature signals; detect an error in the filtered, extracted in-phase and quadrature signals; and apply a correction to in-phase and quadrature signals on the main signal path based on the error.
QPSK demodulator
A novel quadrature phase-shift keying (QPSK) demodulator, called the bowknot quadrature phase-shift keying (BQPSK) demodulator, is disclosed. The BQPSK demodulator uses a delay circuit to delay a BQPSK signal and mixes the delayed BQPSK signal with the undelayed BQPSK signal to output an I-channel data signal and a Q-channel data signal. The BQPSK demodulator further uses a phase rotation circuit to demodulate the orthogonal data signals and obtain a recovery clock signal. The BQPSK demodulator neither uses an A/D converter nor uses a quadrature oscillator, featuring high data rate, low power consumption, simple architecture and superior reliability. The BQPSK demodulator can be realized by digital circuits and analog circuits.
System and method for data communication using amplitude-encoded sinusoids
A system and method for data communication using amplitude-encoded sinusoids. The method includes encoding the input digital data using a plurality of symbol waveforms where each of the plurality of symbol waveforms occupies a period of a composite encoded waveform and represents at least one bit of the input digital data. A first symbol waveform of the plurality of symbol waveforms is defined by a sinusoid of a first amplitude and a second symbol waveform is defined by a sinusoid of a second amplitude different from the first amplitude. The method includes generating an encoded analog waveform from a representation of the composite encoded waveform.