An electronic device includes: a location measurement circuitry; a rechargeable battery; a memory configured to store instructions; and at least one processor. The at least one processor may be configured to execute the instructions to: monitor a usage pattern of the battery while the electronic device operates in a first power management state; acquire, based on determining that the usage pattern of the battery is different from a reference pattern derived from a model, information on a location in which the battery is estimated to be charged and information on a time at which the battery is estimated to be charged using the model; and switch, partially based on the information on the location and the information on the time, the first power management state to a second power management state based on a second maximum driving frequency lower than the first maximum driving frequency.

Methods, systems, and devices for wireless communications are described. A user equipment (UE) may support dynamic clock switching within a transmission time interval (TTI) to allow for more efficient and flexible processing within the TTI. In particular, a user equipment (UE) may be configured to use multiple clock speeds for processing signals within a TTI, and the UE may determine a clock speed to use for processing data within a TTI based on control information received from a base station. For example, the UE may determine an amount of time available for processing data based on the control information received from the base station, and the UE may adjust its clock speed to finish processing the data in the determined amount of time.

Aspects of a digital phase-lock loop (DPLL) with an adjustable delay between an output clock and a reference clock in accordance with phase noise compensation are generally described herein. An apparatus may include processing circuitry configured to, in a first mode, identify a delay element of a plurality of delay elements based on an associated delay value, and set an initial phase difference value to a phase difference value associated with the identified delay element. The processor circuitry may be further configured to, in a second mode, in a second mode, initialize the DPLL using the initial phase difference value, determine a phase error between a reference clock and a feedback clock based on the initial phase difference value, adjust an output clock signal based on the phase error.

Micro-idle power in a subsystem of a portable computing device may be actively managed based on client voting. Each client vote may include a client activity status indication and a client latency tolerance indication. Votes are aggregated to provide an aggregate client latency tolerance, which may be used to obtain a set of micro-idle time values. Micro-idle timers in the subsystem may be set to associated micro-idle time values. The micro-idle timers determine whether one or more of the micro-idle time values have elapsed. A power management policy associated with each micro-idle time value determined to have elapsed may be applied to a portion of the subsystem.

Changes in operating conditions, like voltage or temperature, can cause the frequency of an internal clock signal to change and negatively affect device operation. In one embodiment, a method for controlling internal clock frequency of a device includes counting a number of clock cycles of the internal clock signal relative to a current period of a system clock signal to determine a current mid-cycle count of clock cycles, wherein the internal clock signal is based on a first clock signal of a plurality of clock signals produced in the device, each having a different frequency. When the current mid-cycle count is differs from a calibrated mid-cycle count by more than a tolerable amount, a second clock signal of the plurality of clock signals is selected as the internal clock signal.

A mobile industry processor interface MIPI clock frequency configuration method and apparatus are provided. When a radio frequency band used by a device on which an MIPI is located changes, an MIPI clock frequency is determined according to radio frequency band information, where the radio frequency band information includes the radio frequency band currently used by the device, and the determined MIPI clock frequency causes no interference to the radio frequency band currently used by the device; and an MIPI clock frequency of the device is configured as the determined MIPI clock frequency. According to the technical solutions in the present invention, when a radio frequency band of a device changes, an MIPI clock frequency causes no interference to communication of the device, thereby improving communication quality and stability of the device.

A digital signal processing device of a base station configured to process down-link signals in a wireless communication system employing orthogonal frequency division multiple access (OFDMA) and a method of processing data in the device are provided. The device includes a clock controller configured to monitor whether a signal is allocated to an input and control a frequency of clocks to have a first or second characteristic based on the monitored result, and a data processor configured to process the input, and synchronize with the clock controlled by the clock controller.

Aspects of a digital phase-lock loop (DPLL) with an adjustable delay between an output clock and a reference clock in accordance with phase noise compensation are generally described herein. An apparatus may include processing circuitry configured to, in a first mode, identify a delay element of a plurality of delay elements based on an associated delay value, and set an initial phase difference value to a phase difference value associated with the identified delay element. The processor circuitry may be further configured to, in a second mode, in a second mode, initialize the DPLL using the initial phase difference value, determine a phase error between a reference clock and a feedback clock based on the initial phase difference value, adjust an output clock signal based on the phase error.

A communication device is described comprising a receiver configured to receive data comprising information representing a required quality of service of the transmission of the data, hardware resources configured to perform a processing of the data and a controller configured to set a speed of the processing of the data by the hardware resources based on the determined required quality of service.

A wireless mobile device in a public communication network receives network-initiated signaling or messaging, while operating in a battery-conserving mode, or modes that, keep(s) minimal baseband processing functions awake. The baseband processing functions process incoming signaling or data in a received message to determine whether to act further on information in the incoming message by enabling additional processing capability in the mobile device. The mobile device may have permanent template criteria values, either coded in firmware or implemented in hardware, or temporary template criteria values, stored in RAM or processor registers, that are compared to values of an incoming message or datagram from the mobile network to determine whether to perform additional actions, such as awakening an application processor. Multiple templates may co-exist to allow different incoming datagrams to cause the device to take some additional action, respond, or even ignore information in an incoming datagram or message.