H04W52/0293

Electronic device having two processors to process data

An electronic device may be provided that includes a first processor and a second processor, the first processor to wirelessly receive a data packet from another device, and to determine a property (or type) of the received data packet. When the property or type of the received data packet is a first property or first type then the first processor to process the data packet. On the other hand, when the property or type of the received data packet is a second property or second type then the second processor to process the data packet.

LOW POWER WAKE ON RADIO
20200205078 · 2020-06-25 ·

A low power wake on radio circuit detects if an RF signal is present on an input to the wake on radio circuit. An RF sense circuit supplies an RF sense signal indicating whether the RF signal is present on the input. The RF sense signal is used to incrementally turn on digital decode logic to determine if a radio transmission that is unique to the wake on radio circuit has been received. If the unique radio transmission have been received, the wake on radio circuit supplies a wakeup signal to the rest of the system.

Dynamic clock switching within a transmission time interval

Methods, systems, and devices for wireless communications are described. A user equipment (UE) may support dynamic clock switching within a transmission time interval (TTI) to allow for more efficient and flexible processing within the TTI. In particular, a user equipment (UE) may be configured to use multiple clock speeds for processing signals within a TTI, and the UE may determine a clock speed to use for processing data within a TTI based on control information received from a base station. For example, the UE may determine an amount of time available for processing data based on the control information received from the base station, and the UE may adjust its clock speed to finish processing the data in the determined amount of time.

Sensor-Based Near-Field Communication Authentication

This document describes techniques (400, 500, 600) and apparatuses (100, 700) for implementing sensor-based near-field communication (NFC) authentication. These techniques (400, 500, 600) and apparatuses (100, 700) enable a computing device (102) to detect, in a low-power state, environmental variances indicating proximity with an NFC-enabled device (104) with which to authenticate. In some embodiments, various components of a computing device (102) in a sleep state are activated to process environmental variance(s), perform authentication operations, and/or an indicate initiation of authentication operations to a user.

Method and Apparatus for Selectable High Performance or Low Power Processor System

A communications processor is operative in a plurality of modes including at least a high performance mode, a power savings mode with lower computational capability, and a shutdown mode with a wakeup capability. A memory for the communications processor has a high speed segment and a low speed segment, the high speed segment and low speed segment respectively on a high speed data bus and a low speed data bus, the high speed data bus and low speed data bus coupled by a bidirectional bridge.

Sensor-based near-field communication authentication

This document describes techniques (400, 500, 600) and apparatuses (100, 700) for implementing sensor-based near-field communication (NFC) authentication. These techniques (400, 500, 600) and apparatuses (100, 700) enable a computing device (102) to detect, in a low-power state, environmental variances indicating proximity with an NFC-enabled device (104) with which to authenticate. In some embodiments, various components of a computing device (102) in a sleep state are activated to process environmental variance(s), perform authentication operations, and/or an indicate initiation of authentication operations to a user.

Communication device and method for processing received data

A communication device is described comprising a receiver configured to receive data comprising information representing a required quality of service of the transmission of the data, hardware resources configured to perform a processing of the data and a controller configured to set a speed of the processing of the data by the hardware resources based on the determined required quality of service.

Techniques and apparatuses for configuring a power saving mode of a modem module using an external real-time clock
10499340 · 2019-12-03 · ·

Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment may determine, using a real-time clock (RTC) included in a microcontroller, that a modem module is to exit a power saving mode; instruct a load switch to connect the modem module to a battery of the UE based at least in part on the determination; and instruct the modem module to exit the power saving mode based at least in part on the determination. Numerous other aspects are provided.

BLUETOOTH ASSISTED REMOTE DISCOVERY AND WAKEUP

Disclosed herein are techniques to enable remote discovery of connectivity capabilities and remote connection of devices in a power efficient manner. In particular, discovery and connection requests for connectivity capabilities utilizing a first radio may be communicated using a second radio, the second radio utilizing a lower amount of power relative to the first radio. For example, connectivity capabilities such as Wi-Fi, Wi-Fi Direct, WiGig, Zigbee can be discovered and connection request communicated using a Bluetooth radio.

Method for Reducing Power Consumption of Electronic Device, and Apparatus
20190346905 · 2019-11-14 ·

An electronic device supporting power consumption reduction can be operated in a power saving mode or in an active mode, and the electronic device includes a first processor and a second processor. The first processor is configured to be powered off when the electronic device is in the power saving mode. The second processor is configured to, when the electronic device is in the power saving mode, control peripheral hardware associated with a local bus of the first processor. The peripheral hardware includes at least one of the following: a display unit, an input unit, a BLUETOOTH unit, and a sensing unit.