A high-frequency line substrate is mounted on a printed circuit board. The printed circuit board includes a first high-frequency line. The high-frequency line substrate includes a second high-frequency line and lead pins that connect the first high-frequency line and the second high-frequency line. At the contact portions between the signal lead pins and the second high-frequency line of the high-frequency line substrate, and at the contact portions between the ground lead pins and the second high-frequency line of the high-frequency line substrate, the height of the ground lead pins from an upper surface of the printed circuit board is greater than the height of the signal lead pins.

A semiconductor module includes a semiconductor device having a first land, a second land, and a third land, a wiring board having a substrate, and a fourth land, a fifth land, and a sixth land disposed on the main surface of the substrate, a chip component having a first electrode and a second electrode disposed across a distance in the longitudinal direction and being disposed between the wiring board and the semiconductor device, a first solder joint for bonding the first land, the fourth land, and the first electrode, a second solder joint for bonding the second land, the fifth land, and the second electrode, and a third solder joint for bonding the third land and the sixth land. The volume of the first solder joint and the volume of the second solder joint are each larger than the volume of the third solder joint.

A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, a second trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, and first electrical components and second electrical components disposed on the top exposed surface of the multilayer printed circuit board and associated, respectively, with the first trace and via structure and the second trace and via structure, wherein the first electrical components are mounted orthogonally with respect to the second electrical components.

A capacitor packaging having a central termination and three or more capacitors (or groups of capacitors) arranged about the central termination. The electrical flow paths between the termination and the capacitors or groups of capacitors are of substantially the same length. The capacitors or groups of capacitors may be arranged in a generally circular pattern with the termination centered on the center. The termination may include first and second terminals. The capacitors may be mounted to a printed circuit board (“PCB”) with traces on opposite surfaces of the PCB providing electrical flow paths from the terminals to opposite legs of the capacitors. The capacitor packaging may include a primary PCB with a first circular arrangement of capacitors and a secondary PCB with a second circular arrangement of capacitors. The capacitors may be sandwiched between the PCBs with the second arrangement of capacitors disposed concentrically inwardly of the first arrangement.

Disclosed is an apparatus including a molded multi-die high density interconnect including: a bridge die having a first plurality of interconnects and second plurality of interconnects. The apparatus also includes a first die having a first plurality of contacts and a second plurality of contacts, where the second plurality of contacts is coupled to the first plurality of interconnects of the bridge die. The apparatus also includes a second die having a first plurality of contacts and a second plurality of contacts, where the second plurality of contacts is coupled to the second plurality of interconnects of the bridge die. The coupled second plurality of contacts and interconnects have a smaller height than the first plurality of contacts of the first die and second die.

Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second pair of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to corresponding to first and second distances between electrical contacts of the first and second surface-mount capacitors.

A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor die, and a first capacitor. The substrate has a wiring structure. The redistribution layer is disposed over the substrate. The first semiconductor die is disposed over the redistribution layer. The first capacitor is disposed in the substrate and is electrically coupled to the first semiconductor die. The first capacitor includes a first capacitor substrate, a plurality of first capacitor cells, and a first through via. The first capacitor substrate has a first top surface and a first bottom surface. The first capacitor cells are disposed in the first capacitor substrate. The first through via is disposed in the first capacitor substrate and electrically couples the first capacitor cells to the wiring structure on the first top surface and the first bottom surface.

An apparatus for powering a light-emitting diode (LED) is provided including: a circuit board having an input portion, a power portion, a protection portion, and an output portion; the input portion of the circuit board including an alternating current line and a neutral current line, where the alternating current received across the alternating current line and neutral line supply two distinct, alternative paths, where each of the two distinct alternative paths include a combination of capacitors, inductors, and rectifiers to mitigate signal noise; the power portion of the circuit configured to receive power from the input portion of the circuit along the two distinct, alternative paths, to regulate the current received from the two distinct, alternative paths, and to provide power to an LED driver; and the protection portion of the circuit may be configured to mitigate voltage surges and to regulate the voltage supplied to the LED driver.

Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components in a molding material to create a first molded passive component group. The first molded passive component group is mounted on a surface of a circuit board. The first plurality of passive components are electrically connected to the circuit board.

A semiconductor package including a circuit board including a first wiring region, a die mounting region surrounding the first wiring region, and a second wiring region surrounding the die mounting region; a plurality of wiring balls on the first wiring region and the second wiring region and spaced apart from one another, the plurality of wiring balls including a plurality of first wiring balls on the first wiring region and a plurality of second wiring balls on the second wiring region; a die on the die mounting region, the die including a plurality of unit chips spaced apart from one another, and a die-through region corresponding to the first wiring region and exposing the first wiring balls; and a plurality of die balls on the die and the die mounting region, the plurality of die balls being spaced apart from one another and electrically coupled to the circuit board.