Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.

A radio frequency filter includes a first conductive pattern; a second conductive pattern connected to a first point of the first conductive pattern and extended; a third conductive pattern connected to a second point of the first conductive pattern and extended to surround a portion of the second conductive pattern; a fourth conductive pattern; a fifth conductive pattern connected to a third point of the fourth conductive pattern and extended; and a sixth conductive pattern connected to a fourth point of the fourth conductive pattern and extended to surround a portion of the fifth conductive pattern. The first conductive pattern extends toward the fourth conductive pattern and the fourth conductive pattern extends toward the first conductive pattern. A distance between the first conductive pattern and the fourth conductive pattern is greater than or equal to a distance between the third conductive pattern and the sixth conductive pattern.

Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.

An embodiment of a printed circuit board includes a first insulating layer, a metal layer disposed above the first insulating layer, a second insulating layer disposed above the metal layer, and signal lines disposed above the second insulating layer, the signal lines extending in a first direction and having line widths in a second direction perpendicular to the first direction. The metal layer has open areas overlapping the signal lines in a third direction perpendicular to the first and second directions. In another embodiment, the open areas are replaced with metal meshes.

A system for power delivery network (“PDN”) isolation may include a multi-layer printed circuit board (“PCB”) in which a power distribution layer has a root conductive region and two or more branch conductive regions fanning out from the root conductive region. Each branch conductive region may be insulated from other branch conductive regions by a non-conductive region. Each branch conductive region may have at least one power delivery connection. Each of various electronic circuits mounted on the PCB and sharing the same PDN may be shorted to one of the branch conductive regions.

An optical module includes a photoelectric device and a flexible printed circuit board. The flexible printed circuit board includes an insulating substrate with a first surface and a second surface, a first wiring pattern on the first surface, and a second wiring pattern on the second surface. The first wiring pattern includes a signal line with a signal terminal portion at a tip and a signal-line portion narrower than the signal terminal portion, the first wiring pattern including a pair of ground pads at positions sandwiching the signal-line portion, at least part of the pair of ground pads avoiding being adjacent to the signal terminal portion. The second wiring pattern includes a ground plane overlapping with the signal-line portion and being connected to the pair of ground pads, the second wiring pattern including a signal pad connected to the signal terminal portion.

A novel and useful a single layer RFIC/MMIC structure including a package and related redistribution layer (RDL) based low loss grounded coplanar transmission line. The structure includes a package molded around an RF circuit die with a single redistribution layer (RDL) fabricated on the surface thereof mounted on an RF printed circuit board (PCB) via a plurality of solder balls. Coplanar transmission lines are fabricated on the RDL to conduct RF output signals from the die to PCB signal solder balls. The signal trace transition to the solder balls are funnel shaped to minimize insertion loss and maximize RF isolation between channels. A conductive ground shield is fabricated on the single RDL and operative to shield the plurality of coplanar transmission lines. The ground shield is electrically connected to a ground plane on the PCB via a plurality of ground solder balls arranged to surround the plurality of coplanar RF transmission lines and signal solder balls, and are operative to couple the ground shield to the ground plane on the PCB and provide an electrical return path for the plurality of coplanar transmission lines. Ground vias on the printed circuit board can be either located under the ground solder balls or between them.

A circuit board has an edge connector with signal traces. The signal traces are formed on a dielectric layer of the circuit board. A reference trace is formed within the dielectric layer or on another surface of the dielectric layer. Parameters of the reference trace are adjusted to set an impedance of a single-ended signal trace or a differential impedance of two adjacent signal traces.

A circuit board has an edge connector with signal traces. The signal traces are formed on a dielectric layer of the circuit board. A reference trace is formed within the dielectric layer or on another surface of the dielectric layer. Parameters of the reference trace are adjusted to set an impedance of a single-ended signal trace or a differential impedance of two adjacent signal traces.

A semiconductor device comprises a wiring substrate and a semiconductor chip. In the wiring substrate, a plurality of micro-elements each comprised of a stacked structure including a power supply pattern and a ground pattern is arranged at a predetermined interval. In each of the plurality of micro-elements, the power supply pattern is formed in a wiring layer located one layer above or one layer below a wiring layer in which the ground pattern is formed. A power supply potential is to be supplied to the power supply patter, and a ground potential is to be supplied to the ground patter.