An integrated driving module with energy conversion function includes a patterned conductive circuit layer, an integrated electromagnetic induction component layer, a second dielectric layer, an embedded electrical component and a conductive component. The integrated electromagnetic induction component layer, which has a plurality of conductive coil layer, a plurality of conductive connecting component and a first dielectric layer, is disposed on the patterned conductive circuit layer. The conductive coil layers are stacked. Each conductive connecting component is electrically connected between the two conductive coil layers and between the corresponding conductive coil layer and the patterned conductive circuit layer. The first dielectric layer covers the conductive coil layers and the conductive connecting components. The second dielectric layer covers the patterned conductive circuit layer. The embedded component and the conductive component are disposed in the second dielectric layer electrically connected the patterned conductive circuit layer.

An integrated driving module with energy conversion function includes a patterned conductive circuit layer, an integrated electromagnetic induction component layer, a second dielectric layer, an embedded electrical component and a conductive component. The integrated electromagnetic induction component layer, which has a plurality of conductive coil layer, a plurality of conductive connecting component and a first dielectric layer, is disposed on the patterned conductive circuit layer. The conductive coil layers are stacked. Each conductive connecting component is electrically connected between the two conductive coil layers and between the corresponding conductive coil layer and the patterned conductive circuit layer. The first dielectric layer covers the conductive coil layers and the conductive connecting components. The second dielectric layer covers the patterned conductive circuit layer. The embedded component and the conductive component are disposed in the second dielectric layer electrically connected the patterned conductive circuit layer.

A chip on film package structure including a flexible film, a patterned metal layer, a chip, a patterned solder resist layer, and a code-included pattern is provided. The flexible film comprises a chip mounting region and a peripheral region surrounding the chip mounting region. The patterned metal layer disposed on the flexible film. The chip mounted on the chip mounting region and electrically connected to the patterned metal layer. The patterned solder resist layer exposing the chip mounting region and covering a part of the patterned metal layer. The code-included pattern disposed on the peripheral region of the flexible film. The code-included pattern comprises a plurality of machine-readable data. A method for reading a code-included pattern on a package structure is also provided.

An interactive core for use in making electronic cards has rear and front adhesive layers which surround a stiffening spacer which has an interior opening in which electronic components (e.g., a PCB, battery and display) are located along with thermosetting polymeric material. A battery contained within the interior opening can be activated from an off state to an on state via use of an initialization antenna which can also be configured to allow a CPU to be customized for personal use.

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

The present invention provides stencil-based processes for fan-out wafer-level packaging (FOWLP) that addresses the limitations associated with prior art over-molding of dies. In the inventive process, a temporary carrier is coated with a release layer and curable adhesive backing layer. A die stencil film is then laminated to the coated carrier, and the dies are placed inside pre-formed cavities created in the laminated stencil. The gaps between the dies and the stencil are filled with a curable polymeric material, and a redistribution layer is constructed according to conventional processes. This process results in better repeatability, lower bowing in the carrier, and enhanced downstream processing.

An integrated driving module with energy conversion function includes a patterned conductive circuit layer, an integrated electromagnetic induction component layer, a second dielectric layer, an embedded electrical component and a conductive component. The integrated electromagnetic induction component layer, which has a plurality of conductive coil layer, a plurality of conductive connecting component and a first dielectric layer, is disposed on the patterned conductive circuit layer. The conductive coil layers are stacked. Each conductive connecting component is electrically connected between the two conductive coil layers and between the corresponding conductive coil layer and the patterned conductive circuit layer. The first dielectric layer covers the conductive coil layers and the conductive connecting components. The second dielectric layer covers the patterned conductive circuit layer. The embedded component and the conductive component are disposed in the second dielectric layer electrically connected the patterned conductive circuit layer.

There is provided a copper foil provided with a carrier providing excellent chemical resistance against the copper flash etching solution during the formation of the wiring layer on the surface of the coreless support and excellent visibility of the wiring layer due to high contrast to the antireflective layer in image inspection after copper flash etching. The copper foil provided with a carrier comprises a carrier; a release layer provided on the carrier; an antireflective layer provided on the release layer and composed of at least one metal selected from the group consisting of Cr, W, Ta, Ti, Ni and Mo; and an extremely-thin copper layer provided on the antireflective layer; wherein at least the surface adjacent to the extremely-thin copper layer of the antireflective layer comprises an aggregate of metal particles.

A semiconductor package structure includes an encapsulant, a first chip, a second chip, a first redistribution layer and a second redistribution layer. The encapsulant has a first surface and a second surface opposite to each other. The first chip is in the encapsulant, wherein the first chip includes a plurality of contact pads exposed from the first surface of the encapsulant. The second chip is in the encapsulant, wherein second chip includes a plurality of contact pads exposed from the second surface of the encapsulant. The first redistribution layer is over the first surface of the encapsulant and electrically connected to the contact pads of the first chip. The second redistribution layer is over the second surface of the encapsulant and electrically connected to the contact pads of the second chip.

A component carrier includes a plurality of low density layer structures, and a plurality of high density layer structures having a higher density of electrically conductive structures than the plurality of low density layer structures,where the low density layer structures and the high density layer structures are alternatingly vertically stacked.