An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

In some embodiments, connecting a component to a substrate by adhesion to an oxidized solder surface includes: forming one or more conductive solder connections between the component and one or more conductive portions of the substrate; adhering the component to an oxidized surface of a solder portion applied to the substrate.

A system of circuit card components each include through-holes for soldering having recessed copper layers for thermal insulation. Thermal insulation prevents heat conduction away from flowing solder, allowing the solder to flow freely through the through-hole. Even high-temperature, lead-free solders may maintain the necessary temperature to flow. Different circuit layers include specialized features based on distance from a top or bottom surface. Vias surrounding the through-hole maintain the necessary cross-sectional area for electrical connectivity.

A semiconductor device, including a semiconductor module, a positioning member and a printed board. The semiconductor module includes a case that stores a semiconductor chip, a plurality of external terminals electrically connected to the semiconductor chip and extending upward from a front surface of the case, and a reference pin extending upward from the front surface of the case. The positioning member has a reference hole and a plurality of supporting holes penetrating therethrough. The printed board including a plurality of terminal holes that respectively correspond to the plurality of external terminals. The printed board is disposed on the front surface of the case via the positioning member. The plurality of external terminals of the semiconductor module are respectively attached to the plurality of terminal holes.

Method for providing an electrical connection, comprising connecting a first cable to a first conducting structure on a printed circuit board, connecting a second cable to a second conducting structure on the printed circuit board, comparing a propagation delay of a first signal path comprising the first cable and the first conducting structure on the printed circuit board, and a propagation delay of a second signal path comprising the second cable and the second conducting structure on the printed circuit board; and removing conductive material of the first conducting structure and/or of the second conducting structure, in order to modify an electrical length of the first conducting structure and/or of the second conducting structure, to obtain a first conducting path and a second conducting path, in dependence on a result of the comparison, in order to reduce a difference of the propagation delays between the first signal path and the second signal path.

A microelectronic device includes a die less than 300 microns thick, and an interface tile. Die attach leads on the interface tile are electrically coupled to die terminals on the die through interface bonds. The microelectronic device includes an interposer between the die and the interface tile. Lateral perimeters of the die, the interposer, and the interface tile are aligned with each other. The microelectronic device may be formed by forming the interface bonds and an interposer layer, while the die is part of a wafer and the interface tile is part of an interface lamina. Kerfs are formed through the interface lamina, through the interposer, and partway through the wafer, around a lateral perimeter of the die. Material is subsequently removed at a back surface of the die to the kerfs, so that a thickness of the die is less than 300 microns.

An integrated circuit die (1) is disclosed that comprises a substrate (30) defining a plurality of circuit elements; a sensor region (10) on the substrate, the sensor region comprising a layer stack defining a plurality of CMUT (capacitive micromachined ultrasound transducer) cells (11); and an interposer region (60) on the substrate adjacent to the sensor region. The interposer region comprises a further layer stack including conductive connections to the circuit elements and the CMUT cells, the conductive connections connected to a plurality of conductive contact regions on an upper surface of the interposer region, the conductive contact regions including external contacts (61) for contacting the integrated circuit die to a connection cable (410) and mounting pads (65) for mounting a passive component (320) on the upper surface. A probe including such an integrated circuit die an ultrasound system including such a probe are also disclosed.

Solder-pinning metal pads for electronic components and techniques for use thereof to mitigate de-wetting are provided. In one aspect, a structure includes: a substrate; and a solder pad on the substrate, wherein the solder pad has sidewalls extending up from a surface thereof. For instance, the sidewalls can be present at edges of the solder pad, or inset from the edges of the solder pad. The sidewalls can be vertical or extend up from the solder pad at an angle. The sidewalls can be formed from the same material or a different material as the solder pad. A method is also provided that includes forming a solder pad on a substrate, the solder pad comprising sidewalls extending up from a surface thereof.

A printed circuit board module comprises: a first substrate; a second substrate disposed on the first substrate and including a first region and a second region; a first element disposed on the front surface of the first region; and a second element disposed on the front surface of the second region, wherein the lower end of the first region and the lower end of the second region are disposed in a stepped manner.

The present invention relates to a semiconductor device including a printed circuit board, an electronic component, and a heat diffusion part. The printed circuit board includes an insulation layer, first and second conductor layers disposed respectively on first and second main faces of the insulation layer, a plurality of heat radiation vias penetrating from the first conductor layer to the second conductor layer on the insulation layer, and a conductor film covering inner side walls of the heat radiation vias. The heat radiation vias are provided at positions overlapping the electronic component and the heat radiation part in plan view viewed from the first main face of the printed circuit board. The heat diffusion part is disposed overlapping at least some of the heat radiation vias in plan view viewed from the second main face of the printed circuit board.