Embodiments of the present invention provide a method (1000) of assembling an electrical circuit comprising one or more copper electrical conductors, the method comprising plating (1010) a surface of the one or more conductors with a layer comprising tin; annealing the plating; applying (1020) solder to at least a portion of the one or more electrical conductors, wherein said solder comprises tin and copper; and annealing the electrical circuit.

A method of forming a solderable solder deposit on a contact pad, comprising the steps of providing an organic, non-conductive substrate which exposes said contact pad under an opening of a first non-conductive resist layer, depositing a conductive layer inside and outside the opening such that an activated surface results, thereby forming an activated opening, electrolytically depositing nickel or nickel alloy into the activated opening such that nickel/nickel alloy is deposited onto the activated surface, electrolytically depositing tin or tin alloy onto the nickel/nickel alloy, with the proviso that the electrolytic deposition of later steps results in an entirely filled activated opening, wherein the entirely filled activated opening is completely filled with said nickel/nickel alloy, or in the entirely filled activated opening the total volume of nickel/nickel alloy is higher than the total volume of tin and tin alloy, based on the total volume of the entirely filled activated opening.

A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer and including first and second pads, a solder resist layer formed on the insulating layer, covering the conductor layer and exposing the first and second pads to form the second pad having diameter smaller than diameter of the first pad, a first bump formed on the first pad and including first base and top plating layers such that the first base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion, and a second bump formed on the second pad and including second base and top plating layers such that the second base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and having a conductor pad, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and has an opening exposing the conductor pad in the conductor layer, and a bump formed on the conductor pad of the conductor layer and including a base plating layer formed in the opening of the solder resist layer, an intermediate layer formed on the base plating layer, and a top plating layer formed on the intermediate layer such that that the base plating layer has a side surface exposed from the solder resist layer and that the intermediate layer has a side surface protruding from the side surface of the base plating layer.

A flexible printed circuit board of the present invention includes an insulating base film and an electrode stacked on a first surface of the base film, in which the electrode includes a low-melting-point metal layer on a surface of the electrode, and a plate- or strip-like rigid member electrically insulated from the electrode is disposed in a region of a second surface of the base film opposite from the electrode.

A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer and including first and second pads, a solder resist layer formed on the insulating layer, covering the conductor layer and exposing the first and second pads to form the second pad having diameter smaller than diameter of the first pad, a first bump formed on the first pad and including first base and top plating layers such that the first base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion, and a second bump formed on the second pad and including second base and top plating layers such that the second base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion.

A method for manufacturing a printed wiring board includes forming a conductor layer including first and second pads on an insulating layer, forming a dry film resist layer on the insulating and conductor layers, forming first and second openings exposing the first and second pads, applying first metal plating to form first and second base plating layers on the first and second pads, applying second metal plating to form a first top plating layer of a first post and portion of a second top plating layer of a second bump post, applying the second metal plating further to form second portion of the second top layer of the second post, removing the dry film resist layer, forming a solder resist layer to cover the first and second posts, and thinning the solder resist layer over entire surface to position the first and second top layers outside the solder resist layer.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, an underlayer formed on one of the conductor pads of the conductor layer and including a metal different from a metal of the conductor layer, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and has openings exposing the conductor pads, respectively, and a bump formed directly on a first conductor pad of the conductor pads and including a base plating layer formed in a first opening of the openings and a top plating layer formed on the base plating layer such that a metal of the base plating layer is same as the metal of the conductor layer.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer such that the solder resist layer has first opening exposing the first pad and second opening exposing the second pad with diameter smaller than diameter of the first opening, and bumps including a first bump on the first pad and a second bump on the second pad such that the second bump has diameter smaller than diameter of the first bump. The first bump has a base plating layer formed in the first opening and having raised portion, and a top plating layer formed on the base plating layer, and the second bump has a base plating layer formed in the second opening and having raised portion, and a top plating layer formed on the base plating layer.

A tin or tin alloy plating solution includes: (A) a soluble salt containing at least a stannous salt; (B) an acid selected from an organic acid and an inorganic acid or a salt thereof; (C) a phenyl-based surfactant formed of polyoxyethylene bisphenol ether represented by the General Formula (1); and (D) a leveling agent,

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here, in the Formula (1), X is C.sub.aH.sub.2a (a is 1 or 3) and m is 2 to 12.