The disclosure generally relates to a method of creating patterned metallic circuits (e.g., silver circuits) on a substrate (e.g., a ceramic substrate). A porous metal interlayer (e.g., porous nickel) is applied to the substrate to improve wetting and adhesion of the patterned metal circuit material to the substrate. The substrate is heated to a temperature sufficient to melt the patterned metal circuit material but not the porous metal interlayer. Spreading of molten metal circuit material on the substrate is controlled by the porous metal interlayer, which can itself be patterned, such as having a defined circuit pattern. Thick-film silver or other metal circuits can be custom designed in complicated shapes for high temperature/high power applications. The materials designated for the circuit design allows for a low-cost method of generating silver circuits other metal circuits on a ceramic substrate.

A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.

Provided is flux that can be discharged using an inkjet method and that is capable of bonding to an adherend after application. This flux includes 5-50 mass % of a solid solvent having a melting point of 60° C. or less, 50-80 mass % of a solvent, 5-10 mass % of an organic acid, 10-30 mass % of an amine, and 0-5 mass % of a halide, the flux forming a liquid having a high viscosity of 5 Pa.Math.s or higher at 25° C., and forming a liquid having a low viscosity of 50 mPa.Math.s or less at 100° C.

Disclosed is a method for producing a high-temperature-resistant, lead-free solder joint between a circuit board and a part, wherein a lead-free solder preform is used that has a composite material having a first composite component arranged substantially in layers and wherein the part is soldered with the solder preform in a hot-bar selective soldering process. Also disclosed is a high-temperature-resistant, lead-free solder joint and a field device of automation technology for determining and/or monitoring the process variable of a medium with a high-temperature-resistant, lead-free solder joint.

An electronic circuit has three circuit carriers and two semiconductor components. A first semiconductor component contacts with its upper side an underside of a first circuit carrier, and with its underside an upper side of a second circuit carrier. The first circuit carrier has vias, with a first via connecting the first semiconductor component to a first conducting path and a second via connecting a connection element forming a second conducting path providing an integral connection between the circuit carriers. A second semiconductor component contacts the underside of the first circuit carrier and is electrically connected to the first or second conducting path. An underside of the second semiconductor component contacts an upper side of the third circuit carrier. A lateral thermal expansion coefficient of the first circuit carrier is greater than a lateral thermal expansion coefficient of both the second and the third circuit carrier.

A semiconductor device includes a substrate including a signal pad and a non-signal pad, a semiconductor housing portion including a signal pin and a first non-signal pin, and first bonding members configured to bond the signal pad and the signal pin and to bond the first non-signal pad and the first non-signal pin. The first non-signal pad and the first non-signal pin each have an L shape in a plan view.

This disclosure teaches methods for making high-temperature superconducting striated tape combinations and the product high-temperature superconducting striated tape combinations. This disclosure describes an efficient and scalable method for aligning and bonding two superimposed high-temperature superconducting (HTS) filamentary tapes to form a single integrated tape structure. This invention aligns a bottom and top HTS tape with a thin intervening insulator layer with microscopic precision, and electrically connects the two sets of tape filaments with each other. The insulating layer also reinforces adhesion of the top and bottom tapes, mitigating mechanical stress at the electrical connections. The ability of this method to precisely align separate tapes to form a single tape structure makes it compatible with a reel-to-reel production process.

An object of the present invention is to provide an Sn—Bi—Cu—Ni solder alloy or the like which has a low melting point, excellent ductility, and high tensile strength, and in which if soldering is performed on a Cu electrode subjected to electroless Ni plating treatment, a solder joint formed through this soldering exhibits high shear strength. In addition, another object of the present invention is to provide an Sn—Bi—Cu—Ni solder alloy in which a solder joint formed through soldering exhibits high shear strength even for a Cu electrode which has not been subjected to plating treatment. Furthermore, still another object of the present invention is to provide, in addition to the above-described objects, a solder alloy or the like of which yellowish discoloration can be suppressed and in which change in viscosity of a solder paste over time can be suppressed. The solder alloy has an alloy composition consisting of, by mass %, 31% to 59% of Bi, 0.3% to 1.0% of Cu, 0.01% to 0.06% of Ni, 0.0040% to 0.025% of As, and a balance of Sn.

A system for normalizing the solder interconnects (e.g., normalizing the height of the solder ball interconnects) in a circuit package module (e.g., dual-sided mold grid array package module) after removal from a test board includes a fixture that receives the circuit package module upside down and a stencil removably coupleable to the fixture and over the circuit package module. The stencil has a pattern of apertures that coincides with the pattern of solder interconnects of the circuit package module. Solder paste can be applied over the stencil to pass through the apertures to add solder paste to the solder interconnects. The stencil can be removed from over the fixture, and the circuit package module removed from the fixture. The circuit package module can be heated to reflow the solder interconnects with the added solder paste.

A core material has a core 12; a solder layer 16 made of a (Sn—Bi)-based solder alloy provided on an outer side of the core 12; and a Sn layer 20 provided on an outer side of the solder layer 16. The core contains metal or a resin. When a concentration ratio of Bi contained in the solder layer 16 is a concentration ratio (%)=a measured value of Bi (% by mass)/a target Bi content (% by mass), or a concentration ratio (%)=an average value of measured values of Bi (% by mass)/a target Bi content (% by mass), the concentration ratio is 91.4% to 106.7%. The thickness of the Sn layer 20 is 0.215% or more and 36% or less of the thickness of the solder layer 16.