Disclosed are a thin film structure and an electronic device including the same. The disclosed thin film structure includes a dielectric material layer between a first material layer and a second material layer. The dielectric material layer includes a dopant in a matrix material having a fluorite structure. The dielectric material layer is uniformly doped with a low concentration of the dopant, and has ferroelectricity.

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

A thin film transistor, a manufacturing method of the same, and a CMOS inverter are provided. The thin film transistor includes a base substrate, a dielectric layer, and a semiconductor layer. A first channel is provided between the source and the drain. Carbon nanotubes are provided in the first channel. A second channel is provided between the drain and the gate. An ion gel is provided in the second channel. By regulating a composition of the ion gel and a content of a dopant, a threshold voltage of a carbon nanotube thin film transistor is effectively controlled.

A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer.

A field effect transistor includes a semiconductor substrate, a first pad layer, carbon nanotubes and a gate structure. The first pad layer is disposed over the semiconductor substrate and comprises a 2D material. The carbon nanotubes are disposed over the first insulating pad layer. The gate structure is disposed over the semiconductor substrate and is vertically stacked with the carbon nanotubes. The carbon nanotubes extend from one side to an opposite side of the gate structure.

An object is to provide a field effect transistor using a metal organic framework film as a semiconductor layer and having a novel structure. This embodiment is a field effect transistor that includes a substrate, a source electrode, a drain electrode, a gate electrode, and a metal organic framework film as a semiconductor layer. The metal organic framework film has a stacked structure. A plurality of crystalline structures in which organic ligands having a π-conjugated skeleton and metal ions are coordinated to be developed in a planar direction of the substrate are stacked on the substrate via a π-π interaction in the stacked structure. The crystalline structures each have pores formed by the coordination of the organic ligands and the metal ions. The pores in the adjacent crystalline structures communicate with one another in a film thickness direction in the stacked structure. The field effect transistor is a top-contact type.

An organic light-emitting display apparatus including a substrate; a display unit which defines an active area of the substrate and includes a thin film transistor; concave-convex portions protruded from the substrate in an area outside the active area; and an encapsulation layer which encapsulates the display unit. The thin film transistor includes an active layer, a gate insulating layer on the active layer, a gate electrode, a source electrode, a drain electrode, and an interlayer insulating layer between the gate electrode and the source electrode, and between the gate electrode and the drain electrode. The concave-convex portions include portions of the gate insulating layer and the interlayer insulating layer, and the encapsulation layer covers the concave-convex portions.

The present disclosure provides a method for manufacturing an array substrate, an array substrate, and a display device. The method for manufacturing the array substrate includes: forming a light-shielding layer and a buffer layer in sequence on a base substrate; forming an active layer on the buffer layer, and forming a first via hole in the active layer; forming an interlayer dielectric layer on the active layer; forming a second via hole in the interlayer dielectric layer at a position corresponding to the first via hole and a third via hole in the buffer layer at a position corresponding to the first via hole by a single patterning process; forming a source/drain electrode layer on the interlayer dielectric layer, in which the source/drain electrode layer is electrically connected to the light-shielding layer through the second via hole, the first via hole and the third via hole in sequence.

In a method of forming a gate-all-around field effect transistor, a gate structure is formed surrounding a channel portion of a carbon nanotube. An inner spacer is formed surrounding a source/drain extension portion of the carbon nanotube, which extends outward from the channel portion of the carbon nanotube. The inner spacer includes two dielectric layers that form interface dipole. The interface dipole introduces doping to the source/drain extension portion of the carbon nanotube.

Provided are an organic thin film transistor that has high bendability and can suppress a decrease in carrier mobility caused by a pinhole of an insulating film or leveling properties and a method of manufacturing the organic thin film transistor. The organic thin film transistor includes: a gate electrode; an insulating film that is formed to cover the gate electrode; an organic semiconductor layer that is formed on the insulating film, and a source electrode and a drain electrode that are formed on the organic semiconductor layer, in which the insulating film includes an inorganic film consisting of SiNH.