Patent classifications
H10K10/474
LAYERED METAL OXIDE FIELD EFFECT MATERIAL AND ITS APPLICATION
A layered metal oxide field effect material forms a heterojunction from metal oxides with different band gaps, and defines a band gap difference (E)1 eV. Band bending is generated at the interface of the heterojunction, such that a potential barrier is formed on the side with the larger band gap and a triangular potential well is formed on the side with the smaller band gap, and under the induction of a gate electric field, a polarized charge is generated at the interface of the heterojunction, and a large number of carriers are accumulated. Therefore, the present layered metal oxide field effect material has high carrier mobility higher than 10.sup.3 cm.sup.2/V.Math.s, and overcomes the problem that the carrier mobility of a conventional metal oxide field effect material is low, it is required to fabricate the metal oxide field effect material into a crystal phase structure with a relatively high cost, and even that a substrate thereof with a crystal phase structure is required.
Apparatus with graphene layers intercalated with ion gel
A multilayer graphene composite comprising a plurality of stacked graphene layers separated from one another by an ion gel, wherein the ion gel is intercalated between adjacent graphene layers such that ions within the ion gel are able to arrange themselves at the surfaces of the graphene layers to cause a detectable change in one or more of an electrical and optical property of the graphene layers when a gate voltage is applied to a gate electrode in proximity to the ion gel.
Semiconductor device and display device having a protection layer
According to one embodiment, a semiconductor device includes a first insulating film, a first semiconductor layer formed of polycrystalline silicon, a second semiconductor layer formed of an oxide semiconductor, a second insulating film, a first gate electrode, a second gate electrode, a third insulating film formed of silicon nitride, and a protection layer. The protection layer is located between the second insulating film and the third insulating film, is opposed to the second semiconductor layer, and is formed of either an aluminum oxide or fluorinated silicon nitride.
PI-CONJUGATED BORON COMPOUND, ELECTRONIC DEVICE, AND METHODS RESPECTIVELY FOR PRODUCING TRIARYLBORANE AND INTERMEDIATE THEREOF
There are provided a -conjugated boron compound, an electronic device containing an organic functional layer including the -conjugated boron compound, a method for producing a triarylborane, and a method for producing a triarylborane intermediate. In the -conjugated boron compound, a boron atom is bonded to three aromatic groups via three boron-carbon bonds. Bond distances of the three boron-carbon bonds are all 1.48 or less.
TRANSISTORS WITH CHANNELS FORMED OF LOW-DIMENSIONAL MATERIALS AND METHOD FORMING SAME
A method includes forming a first low-dimensional layer over an isolation layer, forming a first insulator over the first low-dimensional layer, forming a second low-dimensional layer over the first insulator, forming a second insulator over the second low-dimensional layer, and patterning the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator into a protruding fin. Remaining portions of the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator form a first low-dimensional strip, a first insulator strip, a second low-dimensional strip, and a second insulator strip, respectively. A transistor is then formed based on the protruding fin.
Fabrication method of a double-gate carbon nanotube transistor
A method includes depositing a dielectric layer over a substrate, forming carbon nanotubes on the dielectric layer, forming a dummy gate stack on the carbon nanotubes, forming gate spacers on opposing sides of the dummy gate stack, and removing the dummy gate stack to form a trench between the gate spacers. The carbon nanotubes are exposed to the trench. The method further includes etching a portion of the dielectric layer underlying the carbon nanotubes, with the carbon nanotubes being suspended, forming a replacement gate dielectric surrounding the carbon nanotubes, and forming a gate electrode surrounding the replacement gate dielectric.
Thin film transistor and method for making the same
The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a gate on the substrate; a dielectric layer on the gate, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer formed by magnetron sputtering and in direct contact with the gate; a semiconductor layer on the dielectric layer, wherein the semiconductor layer includes nano-scaled semiconductor materials; and a source and a drain, wherein the source and the drain are on the dielectric layer, spaced apart from each other, and electrically connected to the semiconductor layer. The thin film transistor almost has no current hysteresis.
Method for preparing layered metal oxide field effect material
A method for preparing a layered metal oxide field effect material includes depositing a first metal oxide, a core-layer metal, and a second metal oxide sequentially on the substrate by vacuum vapor deposition, the first metal oxide and the core-layer metal undergoing a redox reaction to form a first surface layer and a core-layer precursor on the substrate, and the core-layer precursor and the second metal oxide undergoing a redox reaction to form a core layer and a second surface layer; and the band gap of the metal oxide in the core layer is 3 eV, the band gaps of the metal oxide in the first surface layer and the second surface layer are independently 3 eV, and the difference between the band gap of the metal oxide in the core layer and the band gap of the metal oxide in the first surface layer is 1 eV. The present preparation method has advantages of simple operation, a low production cost, a good film forming property, and the high carrier mobility of the product.
Thin film transistor and filter using thin film transistor
A thin film transistor includes a gate electrode, a gate insulating layer, a carbon nanotube structure, a source electrode and a drain electrode. The gate insulating layer is located on the gate electrode. The carbon nanotube structure is located on the gate insulating layer. The source electrode and the drain electrode are arranged at intervals and electrically connected to the carbon nanotube structure respectively. The thin film transistor further includes an interface charge layer, and the interface charge layer is located between the carbon nanotube structure and the gate insulating layer.
Thin film transistor and method for making the same
The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a semiconductor layer on the substrate, wherein the semiconductor layer includes nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer on the semiconductor layer, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the first sub-dielectric layer. The thin film transistor almost has no current hysteresis.