A field effect transistor includes a carbon nanotube layer formed adjacent to a gate structure. Two intermetallic contacts are formed on the carbon nanotube layer. The two intermetallic contacts include an oxidation resistant compound having a work function below about 4.4 electron-volts.

The present disclosure relates to a memory device having a hybrid insulating layer and a method for preparing the same. In detail, a memory device including a gate electrode on a substrate, a source electrode, and a drain electrode has a hybrid memory insulating layer between the gate electrode and the source and drain electrodes that is polarizable and includes a mixed material of inorganic matter and organic matter to lead to hysteresis. According to the present disclosure, a memory insulating layer is formed as a hybrid insulating layer including a mixture of polyvinylphenol as the organic matter and vinyltriethoxysilane as the inorganic matter to complement the properties of an inorganic memory and an organic memory whereby increasing memory performance, and it stably operates at both low and high temperatures whereby having a wide usage range.

A non-volatile memory device includes a floating gate for charging and discharging of charges over a substrate. The floating gate comprises a linker layer formed over the substrate and including linkers to be bonded to metal ions and metallic nanoparticles formed out of the metal ions over the linker layer.

An organic CMOS circuit including a substrate having an N-type organic transistor and a P-type organic transistor formed thereon, the transistors respectively including a layer of N-type semiconductor material and a layer of P-type semiconductor material. A surface of each of the semiconductor material layers, opposite to the substrate, is covered with an anti-ultraviolet layer made of electrically-insulating material absorbing and/or reflecting ultra-violet rays.

A field effect transistor includes a carbon nanotube layer formed adjacent to a gate structure. Two intermetallic contacts are formed on the carbon nanotube layer. The two intermetallic contacts include an oxidation resistant compound having a work function below about 4.4 electron-volts.

A field effect transistor includes a carbon nanotube layer formed adjacent to a gate structure. Two intermetallic contacts are formed on the carbon nanotube layer. The two intermetallic contacts include an oxidation resistant compound having a work function below about 4.4 electron-volts.

A composition includes a product of a condensation reaction between a thermal cross-linking agent and a product of hydrolysis and condensation polymerization of a compound represented by Chemical Formula 1: ##STR00001## In Chemical Formula 1, the definitions of the substituents are the same as in the detailed description. Further, an electronic device and a thin film transistor include a cured material of the composition.

An organic CMOS circuit including a substrate having an N-type organic transistor and a P-type organic transistor formed thereon, the transistors respectively including a layer of N-type semiconductor material and a layer of P-type semiconductor material. A surface of each of the semiconductor material layers, opposite to the substrate, is covered with an anti-ultraviolet layer made of electrically-insulating material absorbing and/or reflecting ultra-violet rays.

A semiconductor device can be prepared using a precursor dielectric composition that comprises: (1) a photochemically or thermally crosslinked product of a photocurable or thermally curable thiosulfate-containing polymer that has a T.sub.g of at least 50 C. and that comprises: an organic polymer backbone comprising (a) recurring units comprising pendant thiosulfate groups; and further comprises charge balancing cations, and (2) optionally, an electron-accepting photo sensitizer component. The electronic device can be prepared by independently applying the precursor dielectric composition and an organic semiconductor composition to a substrate to form an applied precursor dielectric composition and an applied organic semiconductor composition, respectively, and subjecting the applied precursor dielectric composition to curing conditions to form a gate dielectric layer that is in physical contact with the applied organic semiconductor composition.

A semiconductor device can be prepared with a gate dielectric layer that comprises: (1) a photochemically or thermally crosslinked product of a photocurable or thermally curable thiosulfate-containing polymer that has a T.sub.g of at least 50 C. and that comprises: an organic polymer backbone comprising (a) recurring units comprising pendant thiosulfate groups; and further comprises charge balancing cations, and (2) optionally, an electron-accepting photosensitizer component.